Capacitor-Switched Phase Interpolator for Linear Clock Modulation
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Solution Overview
Problem
Digital-to-time converters (DTCs) face challenges in achieving linear phase shift and constant amplitude in phase-modulated signals, leading to non-linearity and noise floor issues, particularly in modern communication standards like LTE with increased signal bandwidth.
Innovation Solution
A phase interpolator with a plurality of capacitors is used to provide an interpolated, modulated phase information signal by switching capacitors between input clock signals and a reference signal, and a low-pass filter is employed to achieve a linear phase shift and constant amplitude, reducing integral non-linearity and noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a phase interpolator switches capacitors between clock inputs to achieve phase modulation, then phase shift linearity is improved, but integral non-linearity and noise floor increase
Solution Approach 1:
The phase interpolator divides the capacitor array into multiple groups that can be independently switched. Each group corresponds to a specific phase step, allowing fine-grained control of the phase modulation process. This segmentation enables precise phase shifting while maintaining signal integrity and reducing non-linear distortion.
Solution Approach 2:
The capacitor groups are pre-configured with specific weights and connections to the clock inputs. Before modulation occurs, the capacitors are arranged in optimal positions that anticipate the required phase shifts. This preliminary arrangement ensures that when modulation signals are applied, the phase transitions are linear and clean, minimizing integral non-linearity and noise generation.
2Measurement precision
If multiple capacitors are switched for high-resolution phase modulation, then phase resolution is improved, but device complexity increases
Solution Approach 1:
The large capacitor array is segmented into multiple manageable groups, each controlled by independent switching elements. This segmentation reduces the complexity of controlling individual capacitors while maintaining high resolution. Each group can be switched independently, simplifying the overall control logic and reducing the complexity of the switching network.
Solution Approach 2:
The phase interpolator uses a capacitor array with more elements than the minimum required for the desired resolution. This excessive action provides redundant capacitance values that can be combined in multiple ways to achieve the same phase step. This redundancy simplifies the switching network by providing multiple paths to achieve the same result, reducing the complexity of control logic.
Data Source
AI summary
A phase interpolator is provided. The phase interpolator includes a plurality of capacitors, a first input for a clock signal, a second input for a phase shifted clock signal, a reference input for a reference signal, and an output. The phase interpolator is configured to provide at its output an interpolated, modulated phase information signal by switching, dependent on a modulation information, a first number of the capacitors between the first input and the output, a second number of the capacitors between the second input and the output, and a third number of the capacitors to the reference input.