Phase Interpolator Calibration for Accurate TI-ADC Clock Phasing

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Solution Overview

Problem

Time-interleaved analog-to-digital converters face challenges in generating clock signals with precise phase differences due to process, voltage, and temperature variations, leading to inaccuracies and susceptibility to noise, which affect system performance.

Innovation Solution

A phase interpolator-based calibration method that uses differential mode calibration to adjust phase differences between clock signals, eliminating the need for resistor DACs and firmware, and allowing parallel processing to reduce calibration time and improve accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If traditional clock signal generation methods are used, then the system structure is simple, but the phase difference accuracy deteriorates due to PVT variations and noise

Engineering Contradiction:
Improvephase difference accuracyVSAvoidsystem structure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent divides the clock signal generation into multiple independent phase interpolators, each generating a specific phase signal. This segmentation allows individual calibration of each phase signal to achieve accurate phase differences while maintaining modular system structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses phase interpolators to dynamically adjust phase parameters of clock signals based on calibration data. By changing phase parameters through controlled adjustment rather than fixed generation, the system achieves high phase accuracy while keeping the overall structure manageable.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If calibration is performed sequentially, then the calibration process is simple, but the calibration time increases

Engineering Contradiction:
Improvecalibration speedVSAvoidcalibration process complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The calibration process is segmented into independent calibration channels, each handling a specific phase interpolator. This allows parallel execution of calibration operations across multiple channels simultaneously, dramatically reducing total calibration time while keeping each individual calibration channel relatively simple.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary calibration measurements to generate calibration data before actual phase adjustment. This preliminary action enables the system to pre-compute optimal phase values, allowing faster final calibration execution without requiring complex real-time adjustment algorithms.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If resistor DACs and firmware are used for calibration, then the calibration method is traditional, but the calibration time is long and accuracy is reduced

Engineering Contradiction:
Improvecalibration accuracyVSAvoidcalibration time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent replaces traditional resistor DAC-based calibration mechanisms with phase interpolator-based calibration. This substitution eliminates the need for resistive elements and firmware-based algorithms, using instead a more direct phase adjustment mechanism that achieves higher accuracy faster.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent uses calibration data from reference phase signals to generate calibration information for target phase signals. By copying and adapting calibration patterns from known good references, the system achieves accurate calibration without requiring complex measurements or long adjustment periods for each individual signal.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS20250211217A1Phase difference-based calibration using multiple phase interpolators
Publication Date: 2025.06.26 INTEL CORP
  • US20250211217A1 patent drawing
  • US20250211217A1 patent drawing
  • US20250211217A1 patent drawing

AI summary

An apparatus includes a first phase detector circuit, a second phase detector circuit, a comparator circuit, and a calibration circuit. The first phase detector circuit is to generate a first reference voltage signal based on a first phase difference between a target phase signal and a first reference signal. The second phase detector circuit is configured to generate a second reference voltage signal based on a second phase difference between the target phase signal and a second reference signal. The comparator circuit is to generate a comparison voltage output based on the first reference voltage signal and the second reference voltage signal. The calibration circuit is to generate a plurality of control signals based on the comparison voltage output. At least one of the plurality of control signals includes a calibration code causing adjustment of a phase associated with the target phase signal.