Phase Interpolator Slew Rate Measurement via Duty Cycle Distortion

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Solution Overview

Problem

Current integrating phase interpolators face challenges in accurately measuring slew rate over a wide frequency range due to limitations in controlling the voltage swing and maintaining current sources in saturation, which affects phase noise and headroom.

Innovation Solution

A circuit is developed that adjusts the bias current and common-mode voltage to estimate the slew rate by measuring duty cycle distortion across different common-mode thresholds, using AC-coupled inverters and a digital-to-analog converter to calibrate the programmable bias current, ensuring optimal voltage swing and minimizing phase noise.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If voltage swing is increased to improve slew rate measurement accuracy, then measurement precision improves, but current sources leave saturation region causing phase noise increase

Engineering Contradiction:
Improveslew rate measurement accuracyVSAvoidphase noise
Core Design Contradiction:
Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

The patent changes the common-mode voltage parameter to enable accurate slew rate measurement without requiring large voltage swings that would push current sources out of saturation. By adjusting the common-mode level, the measurement can be performed with small differential swings that maintain current source saturation, thus avoiding phase noise while achieving measurement accuracy.

Inventive Principle:
Principle #35Parameter changes

2Object-affected harmful factors

If voltage swing is reduced to maintain current sources in saturation, then phase noise decreases, but slew rate measurement accuracy deteriorates

Engineering Contradiction:
Improvephase noiseVSAvoidslew rate measurement accuracy
Core Design Contradiction:
Object-affected harmful factorsVSMeasurement precision

Solution Approach 1:

The patent introduces common-mode voltage control as an intermediary mechanism that decouples the relationship between differential voltage swing and current source saturation. This allows independent optimization: small differential swings maintain saturation (low phase noise) while the common-mode adjustment enables accurate measurement of the slew rate.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If bias current is increased to improve slew rate, then productivity improves, but headroom decreases affecting circuit operation

Engineering Contradiction:
Improveslew rateVSAvoidheadroom
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

The patent makes the bias current programmable and dynamically adjustable, allowing optimization for different operating conditions. The bias current can be programmed to specific values to achieve desired slew rates while maintaining adequate headroom, and can be adjusted based on operating frequency and load conditions.

Inventive Principle:
Principle #15Dynamics

4Measurement precision

If common-mode voltage is adjusted to optimize measurement, then measurement precision improves, but device complexity increases

Engineering Contradiction:
Improveslew rate measurement accuracyVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent implements common-mode voltage control that serves multiple functions: it enables accurate slew rate measurement, maintains current source saturation, and allows programmable bias current optimization. This multi-functional approach achieves measurement precision without proportionally increasing device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11303282B1Techniques for measuring slew rate in current integrating phase interpolator
Publication Date: 2022.04.12 ANALOG DEVICES INC
  • US11303282B1 patent drawing
  • US11303282B1 patent drawing
  • US11303282B1 patent drawing

AI summary

An apparatus is described and includes a current integrating phase interpolator core having a programmable bias current; an inverter circuit coupled to an output of the current integrating phase interpolator core for receiving a signal comprising a periodic sawtooth waveform therefrom; a digital-to-analog (D/A) converter for setting an input common mode voltage of the inverter circuit; a duty cycle measurement (DCM) circuit for measuring a duty cycle distortion (DCD) of a clock signal output from the inverter circuit; and a circuit for computing a difference between a first state of the DCD of the clock signal corresponding to the input common mode voltage of the inverter circuit being set to a high voltage and a second state of the DCD of the clock signal corresponding to the input common mode voltage of the inverter circuit being set to a low voltage.