Phase Interpolator Slew Rate Measurement via Duty Cycle Distortion

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Solution Overview

Problem

Current integrating phase interpolators face challenges in accurately measuring slew rate over a wide frequency range due to limitations in controlling the voltage swing and maintaining current sources in saturation, which affects phase noise and headroom.

Innovation Solution

A circuit is developed that adjusts the bias current and common-mode voltage to estimate the slew rate by measuring duty cycle distortion across different common-mode thresholds, using AC-coupled inverters and a digital-to-analog converter to calibrate the programmable bias current, ensuring optimal voltage swing and minimizing phase noise.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If voltage swing is increased to improve slew rate measurement accuracy, then measurement precision improves, but current sources leave saturation region causing phase noise increase

Engineering Contradiction:
Improveslew rate measurement accuracyVSAvoidphase noise
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent changes the common-mode voltage parameter to enable accurate slew rate measurement without requiring large voltage swings that would push current sources out of saturation. By adjusting the common-mode voltage level, the system achieves precise measurement while maintaining current source operation in the saturation region, thus avoiding phase noise degradation.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If voltage swing is reduced to maintain current sources in saturation, then phase noise is minimized, but slew rate measurement accuracy deteriorates

Engineering Contradiction:
Improvephase noiseVSAvoidslew rate measurement accuracy
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

Instead of relying on large voltage swings to improve measurement accuracy, the patent changes the common-mode voltage parameter. This allows the system to achieve accurate slew rate measurement with smaller voltage excursions, thereby keeping current sources in saturation and maintaining low phase noise.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If high-resolution D/A converter is used to precisely control common-mode voltage, then measurement precision improves, but device complexity increases

Engineering Contradiction:
Improvecommon-mode voltage control precisionVSAvoidD/A converter resolution
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies partial action by using a low-resolution D/A converter (fewer than 8 bits) that provides sufficient common-mode voltage control precision for slew rate measurement without the complexity of high-resolution converters. The system achieves the necessary measurement accuracy with reduced complexity by implementing only the minimal required control precision.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11165431B1Techniques for measuring slew rate in current integrating phase interpolator
Publication Date: 2021.11.02 ANALOG DEVICES INC
  • US11165431B1 patent drawing
  • US11165431B1 patent drawing
  • US11165431B1 patent drawing

AI summary

An apparatus is described and includes a current integrating phase interpolator core having a programmable bias current; an AC-coupled inverter circuit coupled to an output of the current integrating phase interpolator core for receiving a signal comprising a periodic sawtooth waveform therefrom; a digital-to-analog (D/A) converter for setting an input common mode voltage of the AC-coupled inverter circuit; a duty cycle measurement (DCM) circuit for measuring a duty cycle distortion (DCD) of a rectangular wave clock signal output from the AC-coupled inverter circuit; and a circuit for computing a difference in the DCD of the rectangular wave clock signal when the input common mode voltage of the AC-coupled inverter circuit is set to a high voltage and when the input common mode voltage of the AC-coupled inverter circuit is set to a low voltage.