Phase-Mixed I/O Driver Circuit for Fine Slew Rate Control
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Solution Overview
Problem
Current timing control methods for semiconductor memory devices offer only coarse control over slew rate, limiting the precision with which output signals can be synchronized with external clock signals, and require multiple inverter delays, which occupy valuable space in densely packed integrated circuits.
Innovation Solution
The implementation of phase mixer circuitry in adjustable driver circuits allows for fine resolution control of slew rate by configuring driver lines with phase mixers that generate delayed signals, reducing the need for external delay generation and enabling dynamic impedance control, thereby enhancing signal integrity and timing precision.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple inverter delays are used for timing control, then coarse slew rate control is achieved, but circuit area increases and precision is limited
Solution Approach 1:
The output driver circuit is segmented into multiple independently controllable driver lines (e.g., 4 driver lines per output line). Each driver line can be individually timed and controlled, allowing precise slew rate adjustment without requiring multiple inverter stages. This segmentation enables fine-grained timing control while minimizing area usage.
Solution Approach 2:
The circuit employs dynamic timing control where the timing of each driver line can be independently adjusted relative to others. This dynamic control allows the slew rate to be precisely controlled by adjusting the relative timing of individual driver lines, replacing static inverter delay chains with flexible, programmable timing control.
2Speed
If inverter delays are added to output path for timing control, then slew rate is decreased, but logic level changes are required and minimum delay is limited to two inverter delays
Solution Approach 1:
Each driver line is designed to be universally controllable with the same control mechanism. The driver lines can all be timed relative to a common reference signal, and their timing can be independently adjusted without requiring different logic levels or complex control circuits. This universal control approach simplifies the overall device complexity while maintaining precise slew rate control.
3Measurement precision
If static timing configuration is used, then implementation is simple, but fine resolution slew rate control is not achievable
Solution Approach 1:
The timing control mechanism is made dynamic and adjustable. Each driver line's timing can be independently programmed or controlled relative to a reference signal, allowing fine resolution adjustment of slew rate. This dynamic control replaces static inverter delay chains with flexible, programmable timing control that achieves precise slew rate resolution.
4Area of stationary object
If driver lines are densely packed in integrated circuit, then area is reduced, but timing control precision is compromised
Solution Approach 1:
The output driver is segmented into multiple independent driver lines that can be tightly packed in the integrated circuit. Each driver line maintains independent timing control capability, allowing precise slew rate control even in densely packed configurations. The segmentation enables area efficiency while preserving timing precision through independent control of each segment.
Data Source
AI summary
An apparatus includes a terminal, a first plurality of driver lines, and a first phase mixer. The driver lines drive the terminal to a first logic state responsive to a first enable signal. The first phase mixer is coupled to a first one of the first plurality of driver lines. The first phase mixer is operable to receive the first enable signal and a first delayed enable signal derived from the first enable signal and generate a first signal on the first driver line having a first configurable delay with respect to the first enable signal by mixing the first enable signal and the first delayed enable signal.