Data Output Buffer Timing Using Phase Mixers to Cut Jitter
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Solution Overview
Problem
Conventional data output circuits in semiconductor memory devices face challenges in precisely adjusting the slew rate due to RC delay control, which is difficult to implement effectively under environmental variations and limits high-speed operations, leading to increased noise and jitter.
Innovation Solution
A data output circuit with a pre-driving block generating pull-up and pull-down signals in response to control signals, utilizing phase mixers to adjust enable times, allowing for precise control of the main driving block's slew rate without relying on RC delay control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If RC delay control is used to adjust the slew rate, then the slew rate can be controlled, but the control precision deteriorates under environmental variations and causes increased noise and jitter
Solution Approach 1:
The patent replaces the conventional RC delay control mechanism with a phase mixer-based control system. Instead of using resistors and capacitors to create time delays, the invention uses phase mixers that combine multiple clock signals with different phases to generate precise control signals for the main driver. This substitution eliminates the bandwidth limitations and environmental sensitivity of RC circuits while achieving precise slew rate control through phase manipulation, thereby reducing noise and jitter in high-speed operations
Solution Approach 2:
The patent changes the control parameter from RC time constants to phase differences of clock signals. By varying the phase relationships between clock signals input to the phase mixer, the enable times of pull-up and pull-down signals are precisely adjusted. This parameter change allows dynamic adaptation to environmental variations (PVT) without the fundamental limitations of RC circuits, maintaining control precision across different operating conditions while minimizing noise generation
2Measurement precision
If RC delay control is used to adjust the turn-ON timing, then the slew rate can be modified, but the bandwidth decreases and jitter increases
Solution Approach 1:
The patent substitutes the RC delay control system with a phase mixer-based timing control system. The phase mixer receives multiple clock signals and generates control signals with precisely adjusted enable times by manipulating phase relationships. This substitution removes the inherent bandwidth limitations of RC circuits, enabling high-speed operations while maintaining precise turn-ON timing control. The circuit achieves both accurate timing adjustment and high bandwidth performance simultaneously
Solution Approach 2:
The patent employs periodic clock signals with different phases as input to the phase mixer. By utilizing the periodic nature of these clock signals and their phase relationships, the system generates control signals with precisely controlled enable times. This periodic action approach allows the circuit to operate at high speeds synchronized to the clock frequency while maintaining precise timing control, avoiding the bandwidth restrictions of RC delay methods
Data Source
AI summary
A data output circuit includes a pre-driving block configured to receive input data, generate a plurality of pull-up signals and pull-down signals, and change enable times of the pull-up signals and the pull-down signals in response to a plurality of control signals, and a main driving block configured to generate output data in response to the pull-up signals and the pull-down signals.