Phase Mixing Circuit With Jitter Cancellation for Clock Alignment
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Solution Overview
Problem
Conventional multi-phase clock signal alignment circuits can reduce skew between high-speed clock signals but increase jitter, failing to effectively address both issues simultaneously.
Innovation Solution
A multi-phase clock signal alignment circuit incorporating phase mixing circuits with jitter cancellation and delay adjustment capabilities, utilizing multiple phase delay circuits, phase mixing circuits, a clock selection circuit, and a phase detection circuit to control delays and phase differences, thereby reducing jitter and skew.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a multi-phase clock signal alignment circuit based on DLL is used to remove skew, then skew between multi-phase clock signals is reduced, but jitter in those signals increases
Solution Approach 1:
The alignment circuit is divided into multiple independent phase delay circuits, each handling a specific phase of the clock signal. This segmentation allows independent adjustment of each phase path, enabling skew correction without propagating jitter across all phases.
Solution Approach 2:
Each phase delay circuit is configured with locally optimized delay elements that provide precise delay control for its specific phase path. This local optimization ensures that each phase is adjusted independently to achieve minimal skew while maintaining low jitter characteristics specific to that phase path.
2Manufacturing precision
If delay adjustment is applied to align clock phases, then phase alignment is improved, but signal quality may deteriorate due to additional delay elements
Solution Approach 1:
The delay adjustment circuit employs dynamically controllable delay elements that can be programmed to provide precise delay values. This dynamic control allows for fine-tuning of phase alignment while minimizing the number of delay stages, thereby reducing signal degradation.
Solution Approach 2:
The circuit changes the delay parameter of each phase path independently through programmable delay elements. By adjusting delay parameters rather than adding fixed delay stages, the circuit achieves phase alignment with minimal impact on signal quality.
Data Source
AI summary
A phase mixing circuit for a multi-phase signal includes a jitter cancellation circuit configured to mix phases of a signal input to a first node and a signal input to a second node to produce signals at a third node and a fourth node; and a delay adjustment circuit configured to adjust delays of the signals output from the third node and the fourth node to produce signals at a fifth node and a sixth node.