Built-In Phase Noise Measurement Using DLL and TDC Isolation
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Solution Overview
Problem
Phase noise measurement using probes is costly and complex, and built-in-self-test (BIST) circuits are affected by noise or disturbances from the reference clock signal, leading to impure phase noise measurements.
Innovation Solution
A system incorporating a delay locked loop (DLL) circuit, a pseudo-DLL circuit, and a time-to-digital converter (TDC) that generates clock signals and a reference clock signal with programmable phase differences, allowing the DLL circuit to align its phase with the reference clock signal, thereby isolating the phase noise measurement from reference clock noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If probes are used for phase noise measurement, then measurement accuracy is improved, but cost and device complexity increase
Solution Approach 1:
The patent extracts the phase noise measurement function from the external probe system and integrates it into the device-under-test itself through BIST circuits. The measurement functionality is taken out of the expensive external equipment and embedded within the device, eliminating the need for costly probes while maintaining measurement capability.
Solution Approach 2:
The device-under-test performs its own phase noise measurement through built-in self-test circuits that generate test signals and measure phase noise internally. This self-service approach eliminates dependency on external measurement equipment, reducing both cost and complexity while enabling continuous monitoring.
2Device complexity
If BIST circuit is used for phase noise measurement, then cost and device complexity are reduced, but measurement precision deteriorates due to reference clock noise
Solution Approach 1:
The patent segments the measurement system into separate functional blocks: a reference clock signal generator, a delay-locked loop with programmable delay elements, and a phase noise measurement unit. By dividing the system into modular segments with distinct functions, the reference clock noise can be isolated and compensated for separately, improving measurement precision while maintaining the low-cost BIST architecture.
Solution Approach 2:
The patent changes the delay parameter of the delay-locked loop to match the group delay of the device-under-test across different frequency points. This parameter adjustment enables the system to compensate for reference clock noise effects and accurately measure phase noise without requiring expensive external equipment.
3Adaptability or versatility
If reference clock signal is used in BIST circuit, then measurement functionality is enabled, but noise and disturbance are introduced
Solution Approach 1:
The patent introduces a delay-locked loop as an intermediary between the reference clock signal and the phase noise measurement. The DLL acts as a mediator that transfers only the frequency information from the reference clock while blocking the noise and disturbances, enabling measurement functionality without introducing harmful factors.
Solution Approach 2:
The patent implements feedback control through the delay-locked loop that continuously monitors and adjusts the delay parameter to maintain synchronization with the device-under-test. This feedback mechanism enables the system to adapt to changing conditions while compensating for reference clock noise, maintaining measurement accuracy throughout the frequency sweep.
Data Source
AI summary
A system, a method and a built-in phase noise measurement apparatus are introduced. The built-in phase noise measurement apparatus includes a first DLL and a TDC, in which the first DLL circuit controls a delay of a first signal to generate a second signal based on a control code, tune the control code until a phase of the second signal is aligned to a phase of a reference clock signal, and record a value of the control code when the phase of the second signal is aligned to the phase of the reference clock signal. The DLL circuit controls the delay of the first signal based on the value of the control code after the phase of the second signal is aligned to the phase of the reference clock signal. The TDC determines the phase noise of the first signal based on the reference clock signal and the second signal.