PLL and DLL Phase Offset Correction for Low-Spur Synthesizers
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Solution Overview
Problem
Frequency synthesizers in communication devices, such as two-way radios and cell phones, suffer from static phase offset errors that lead to spurs in output signals, affecting blocking performance, self-quieting, spectral mask capabilities, and electromagnetic interference, and require complex characterization and expertise for correction.
Innovation Solution
An autonomous correction system using an auto-tuning circuit with a counter, decision and logic circuitry, comparator, and digital-to-analog converter measures and corrects static phase offset errors in delay locked loop and phase locked loop systems, reducing spurs and improving settling time without external intervention or programming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If DLL and PLL circuits are used for frequency synthesis, then stable signals are generated for transmit and receive modes, but static phase offset errors occur which generate spurs in the output signal
Solution Approach 1:
The patent applies preliminary action by measuring and correcting static phase offset errors before they significantly degrade signal quality. The system performs error measurement and correction in advance through automated calibration sequences, preventing spur generation rather than addressing it after occurrence. This is implemented through pre-programmed correction values stored in lookup tables that compensate for anticipated phase offsets.
Solution Approach 2:
The patent implements feedback mechanisms by continuously monitoring phase offset errors and automatically adjusting correction values. The system measures actual phase offsets during operation, compares them against target values, and applies real-time corrections through feedback loops. This closed-loop approach ensures that spurs are minimized dynamically rather than relying solely on static pre-correction.
2Object-generated harmful factors
If static phase offset errors are corrected using traditional methods, then signal quality improves, but device complexity and characterization requirements increase
Solution Approach 1:
The patent applies self-service by enabling the frequency synthesizer to automatically measure and correct its own phase offset errors without external intervention. The system includes self-diagnostic capabilities that autonomously identify error sources, retrieve appropriate correction values from stored lookup tables, and apply corrections independently. This eliminates the need for manual characterization and reduces device complexity by making the correction process self-contained.
Solution Approach 2:
The patent utilizes parameter changes by storing multiple sets of correction values corresponding to different operating conditions (temperature, frequency ranges, process variations). The system dynamically selects and applies the appropriate correction parameters based on current operating conditions, allowing a single device to handle multiple scenarios without increasing complexity. This is achieved through programmable correction tables that can be configured for different operating modes.
3Adaptability or versatility
If adaptive loop bandwidth DLL/PLL systems are used, then frequency agility is improved, but settling time increases due to dominant phase offset errors
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing correction values for various frequency transitions in lookup tables. Before executing frequency switches, the system retrieves the appropriate correction parameters in advance, allowing rapid settling without waiting for error accumulation during the transition. This pre-positioning of correction data enables fast frequency agility while maintaining short settling times.
Solution Approach 2:
The patent implements dynamics by making the correction system adaptive to changing operating conditions. The system dynamically adjusts correction values based on real-time measurements of phase offsets, temperature variations, and frequency transitions. This dynamic correction approach allows the system to maintain optimal performance across different frequency ranges and operating conditions without sacrificing settling speed, as corrections are applied proportionally to the actual measured errors.
Data Source
AI summary
A frequency synthesizer that utilizes locked loop circuitry, for example delay locked loop and/or phase locked loop circuits is provided with a means for minimizing static phase/delay errors. An auto-tuning circuit and technique provide a measurement of static phase error by integrating the static phase error in the DLL/PLL circuit. A correction value is determined and applied as a current at the charge pump or as a time/phase offset at the phase detector to minimize static phase error. During normal operation the DLL/PLL is operated with the correction value resulting in substantially reduced spur levels and/or improved settling time.