Phase Offset Cancellation Circuit for Accurate Quadrature Clocks
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Solution Overview
Problem
Existing clock generation methods fail to provide accurate quadrature phase relations due to phase offsets caused by noise and mismatch in clock transmission paths, leading to incorrect clock data recovery in sequential circuits.
Innovation Solution
A phase offset cancellation circuit using modifying phase interpolators to perform equal phase interpolation between input clocks, generating modified clocks that maintain accurate quadrature phase relations, and adjustable phase interpolators to further refine the output clocks for precise phase alignment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If phase interpolation is performed using prior art methods, then clock generation is achieved, but phase offsets cause inaccurate quadrature phase relations
Solution Approach 1:
The clock generation process is segmented into two distinct stages: first generating modified clocks with accurate quadrature phase relations using modifying phase interpolators, then generating final output clocks with adjustable phases using adjustable phase interpolators. This segmentation isolates the phase accuracy function from the phase adjustment function, ensuring that phase offsets do not compromise the quadrature relation.
Solution Approach 2:
The modifying phase interpolators perform preliminary phase correction by generating modified clocks with accurate quadrature phase relations before the adjustable phase interpolators perform final phase adjustment. This preliminary action ensures that the foundation for accurate phase relations is established before subsequent adjustments are made.
2Productivity
If standard phase interpolators are used, then clock generation is achieved, but noise and mismatch in transmission paths cause phase offsets
Solution Approach 1:
The modifying phase interpolators act as intermediary components between the input clocks and the adjustable phase interpolators. They mediate the phase relations by generating modified clocks with accurate quadrature phase relations, thereby isolating the system from the harmful effects of noise and mismatch in the transmission paths.
Solution Approach 2:
The circuit acknowledges that phase offsets from noise and mismatch are inevitable, but converts this harmful effect into a benefit by designing the modifying phase interpolators to generate accurate quadrature phase relations despite these offsets. The harmful phase offsets are compensated for through the specific architecture that ensures accurate phase relations in the modified clocks.
3Adaptability or versatility
If phase adjustment is performed without prior phase correction, then clock flexibility is achieved, but phase accuracy deteriorates due to accumulated offsets
Solution Approach 1:
The phase adjustment process is segmented into two independent operations: phase correction (achieving accurate quadrature relations) and phase adjustment (achieving flexible phase alignment). The modifying phase interpolators handle correction while adjustable phase interpolators handle flexibility, allowing both goals to be achieved without compromising either.
Solution Approach 2:
Phase correction is performed as a preliminary action before phase adjustment. The modifying phase interpolators first establish accurate quadrature phase relations, creating a clean foundation that allows the adjustable phase interpolators to perform flexibility adjustments without accumulating phase offsets.
Data Source
AI summary
Phase offset cancellation circuit and associated clock generator, include a first modifying phase interpolator and a second modifying phase interpolator, and provide a first modified clock and a second modified clock according to a first to a fourth input clocks; wherein the first and the third clocks are of opposite phases. The first modifying phase interpolator performs equal phase interpolation between the first and the second input clocks to generate the first modified clock, and the second modifying phase interpolator performs equal phase interpolation between the third and the fourth input clocks to generate the second modified clock, such that a phase difference between the first modified clock and the second modified clock is of substantially 90 degrees, against phase offsets between the first to the fourth input clocks.