Phase Selector Jitter Tolerance via Dynamic Thresholds
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Solution Overview
Problem
Existing clock and data recovery circuits face instability due to jitter, leading to incorrect phase selection and system instability, especially when accumulated transition numbers are close or switching between regions, causing the selection of incorrect over-sampling signals as output data.
Innovation Solution
A phase selector comprising a comparing module, a weighting circuit, and a predictor that compares phase detecting signals with previous cycle signals, calculates error signals, and adjusts the phase selecting signal based on predetermined threshold values to reduce memory effects and stabilize phase selection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the phase selector uses accumulated transition numbers to determine phase selection, then the phase selection can be made based on historical data, but the system becomes unstable when jitter causes transition numbers to be close or switch between regions
Solution Approach 1:
The patent introduces a dynamic threshold adjustment mechanism where the threshold for phase selection is not fixed but adapts based on the current operating conditions. The threshold is adjusted according to the detected jitter level, allowing the system to dynamically respond to changing conditions and maintain stability without being overly influenced by historical accumulated transition numbers.
Solution Approach 2:
The patent changes the parameter used for phase selection from fixed accumulated transition numbers to a dynamic threshold that varies with jitter conditions. By modifying the selection criterion based on real-time jitter detection, the system can maintain reliable phase selection while reducing the harmful memory effect of persistent historical accumulation.
2Speed
If the phase selector rapidly responds to phase changes, then the phase can be locked quickly during small jitter, but the system becomes sensitive to large jitter causing instability
Solution Approach 1:
The patent implements a dynamic response mechanism where the phase selector's responsiveness is adjusted based on the detected jitter level. During small jitter conditions, the system responds rapidly to lock the phase quickly. During large jitter conditions, the system reduces its responsiveness to maintain stability, preventing incorrect phase selections while still being able to track legitimate phase changes.
Solution Approach 2:
The patent prepares for potential instability by implementing a threshold-based filtering mechanism that anticipates and prevents incorrect phase selections during large jitter conditions. The dynamic threshold acts as a cushion that absorbs the impact of excessive jitter while allowing legitimate phase changes to pass through, thereby protecting the system from instability before it occurs.
Data Source
AI summary
A phase selector capable of tolerating jitters is applied in a clock and data recovery circuit. The phase selector includes a comparing module, a weighting circuit, and a predictor. The comparing module compares a phase-detecting signal and a phase-selecting signal corresponding to the last cycle so as to generate an error signal. The weighting circuit calculates a weighting error signal according to the error signal and a weighting parameter. The phase predictor compares the weighting error signal and predetermined threshold values so as to generate the phase-selecting signal corresponding to the present cycle. When the received input data stream of the clock and data recovery circuit has a small jitter, the phase selector rapidly locks the phase so as to generate the correct phase-selecting signal. When the received input data stream of the clock and data recovery circuit has a large jitter, the phase selector stably generates the phase-selecting signal.