Phase-Shift Clocking for Fine LLC Converter Frequency Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Frequency-modulated circuits face challenges in achieving high resolution for control signals, particularly in high-frequency power converters, where small frequency changes result in large output variations, requiring precise frequency control to maintain efficiency and performance, but existing methods either increase power consumption or system complexity.
Innovation Solution
A phase shift clock system that increments the phase shift of a second clock signal relative to a master input clock, allowing for finer resolution in frequency control without the need for higher frequency master clocks, using a clock phase shift circuit that charges and discharges a capacitor to generate a phase-shifted clock signal, enabling more precise timing for driver signals in frequency-modulated circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If counting whole clock cycles of a system clock is used to generate input signals, then the system complexity remains low, but the frequency resolution is not fine enough to accurately control the input signal frequency
Solution Approach 1:
The patent segments the frequency control into two independent parts: an integer frequency component controlled by counting whole clock cycles, and a fractional frequency component controlled by adjusting the phase shift of the clock signal. This segmentation allows achieving fine frequency resolution through phase shift adjustment without increasing overall system complexity, as each component can be controlled separately using simple mechanisms.
Solution Approach 2:
The patent introduces dynamic phase shift adjustment capability to the clock signal, allowing the phase to be varied continuously while maintaining the same frequency. This dynamic parameter adjustment provides fine frequency control resolution without requiring additional hardware complexity, as phase shift can be controlled through simple timing adjustments in the pulse width modulation circuit.
2Measurement precision
If techniques to increase resolution are applied, then the frequency control accuracy improves, but system power consumption increases
Solution Approach 1:
The patent changes the timing parameter (phase shift) of the existing clock signal to achieve fine frequency control, rather than increasing the clock frequency or adding complex generation circuits. This parameter change approach maintains the same hardware operating conditions and power consumption levels while achieving the desired frequency resolution through intelligent signal processing.
3Measurement precision
If techniques to increase resolution are applied, then the frequency control accuracy improves, but system complexity and cost increase
Solution Approach 1:
The patent makes the existing clock signal serve multiple functions: it provides both the frequency reference for counting and the timing reference for pulse width modulation, with the added capability of phase shift adjustment for fine frequency control. This multi-functionality eliminates the need for separate high-resolution frequency generation circuits, thereby avoiding increased system complexity and cost.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for high-resolution frequency control in frequency-modulated circuits like LLC converters, reducing power consumption and complexity while maintaining performance, by using a single phase-shifted clock to achieve finer resolution than traditional methods, thus improving efficiency and accuracy.
Implementation Method 1
a capacitor; a charging current unit configured to generate a charging current at a plurality of amperage levels, wherein: the charging current charges the capacitor for a predetermined charge time
Implementation Method 2
a discharge current unit configured to: discharge the capacitor at a fixed, constant discharge current
Implementation Method 3
a comparator configured to output a trigger signal in response to detecting a voltage across the capacitor crossing a predetermined threshold
Data Source
AI summary
The techniques of this disclosure may digitally generate a driver signal with a period (or frequency) at a finer resolution than can be achieved by simply counting clock cycles of a system clock. The driver signal may be configured to trigger based on single output clock signal that may be phase-shifted relative to the master system clock. A clock phase shift circuit may increment the phase shift of the output clock signal to any fraction relative to the master system clock. A driver signal generated based on the phase-shifted output clock may achieve the high resolution in frequency desirable when controlling some pulse-width modulated circuits, such as an LLC converter.