Phase-Shift PWM Circuit for High Resolution Without Clock Instability

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Solution Overview

Problem

Pulse width modulation circuits face a trade-off between high resolution and high speed response, with increasing clock signal frequency leading to unstable internal calculations and requiring additional resistors or switching elements, which increases circuit size and cost, especially in high-power applications.

Innovation Solution

A pulse width modulation circuit that generates multiple reference signals with differing phases, compares them to an input signal using a comparator, and synthesizes the results using logical operations to produce a high-resolution binary signal, reducing the need for multiple resistors or switching elements and allowing for increased resolution without increasing clock signal frequency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the frequency of clock signals is heightened to achieve high resolution, then the resolution of pulse width modulated signal is improved, but the internal calculation process becomes unstable and speed response decreases

Engineering Contradiction:
Improveresolution of pulse width modulated signalVSAvoidstability of internal calculation process
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The invention divides the single high-frequency clock signal into multiple lower-frequency clock signals with different phases. By segmenting the reference signal generation into multiple phases (e.g., 4 phases), the system achieves high resolution without requiring a single high-frequency clock, thus maintaining calculation stability while improving resolution.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If multiple resistors or switching elements are added to generate multivalued signal in voltage axis direction, then the resolution is improved, but the circuit size increases and cost increases

Engineering Contradiction:
ImproveresolutionVSAvoidcircuit size
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

Instead of increasing resolution in the voltage axis direction (which requires multiple resistors or switching elements), the invention transitions to increasing resolution in the temporal axis direction by using multiple clock signals with different phases. This dimensional shift allows high resolution to be achieved through time-multiplexed phase comparison rather than through additional voltage-stage components.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Measurement precision

If multiple resistors or switching elements are added to output multivalued signal, then the resolution is improved, but the cost increases

Engineering Contradiction:
ImproveresolutionVSAvoidcost
Core Design Contradiction:
Measurement precisionVSEase of manufacture

Solution Approach 1:

The invention achieves high resolution by transitioning from voltage-axis multivalued signals (requiring multiple resistors/switching elements) to temporal-axis phase-based signals. By using phase-differentiated clock signals and comparing input signals across multiple phases, the system attains high resolution without the need for expensive additional passive components or switching elements.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS8022743B2Pulse width modulation circuit and liquid jet printing apparatus
Publication Date: 2011.09.20 SEIKO EPSON CORP
  • US8022743B2 patent drawing
  • US8022743B2 patent drawing
  • US8022743B2 patent drawing

AI summary

A pulse width modulation circuit includes: a reference signal generator which generates a plurality of mutually differing reference signals; a comparator which compares the reference signals and an input signal with respect to magnitude, and outputs results of the comparison as a plurality of comparison signals with mutually differing phases; and a synthesizer which, using a logical operation, outputs the plurality of comparison signals output from the comparator as a pulse width modulated signal configured of one or more binary signals.