Phase Shift Test Patterns for Lithography Focus and Dose Control
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Solution Overview
Problem
As semiconductor devices are scaled down, lithography processes face challenges in maintaining consistent focus and exposure dose, leading to unpredictable feature dimensions, necessitating improved methods for focus and dose detection in lithography systems.
Innovation Solution
The use of attenuated phase shifting masks with test patterns of varying phase shifts to measure critical dimensions of features formed on photosensitive material, allowing for determination of optimal focus and dose levels in lithography systems through novel test structures and methods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If semiconductor devices are scaled down to reduce size, then device density and integration are improved, but lithography precision and feature dimension control deteriorate due to parameter variations
Solution Approach 1:
The patent applies preliminary action by incorporating test patterns with varying phase shifts into the lithography mask before the actual manufacturing process. These test patterns are exposed along with the device patterns, allowing focus and dose detection to be performed in advance on the same wafer, thereby enabling proactive adjustment of lithography parameters before full production exposure.
Solution Approach 2:
The patent implements feedback by measuring the dimensions of features formed from test patterns with different phase shifts, comparing these measurements to determine focus level and exposure dose, and using this information to adjust lithography system parameters. This closed-loop feedback enables continuous optimization of lithography precision as devices are scaled down.
2Ease of manufacture
If conventional lithography masks are used without phase shift variations, then manufacturing process is simple, but detection precision of focus and dose deviations is insufficient
Solution Approach 1:
The patent applies local quality by creating regions with different phase shift characteristics (0°, 45°, 90°, 135°, 180°) in different areas of the same lithography mask. Each region has optimized local properties for detecting specific deviations, allowing precise measurement of focus and dose variations while maintaining overall mask manufacturability through standardized fabrication processes.
3Adaptability or versatility
If multiple lithography mask levels are used to manufacture integrated circuits, then device functionality is improved, but process complexity and parameter variation accumulation increase
Solution Approach 1:
The patent implements universality by designing a multi-phase shift test pattern system that can detect both focus and dose deviations across all lithography mask levels. The same test pattern structure with varying phase shifts is applied consistently through multiple lithography steps, providing a universal detection method that simplifies process control despite the complexity of multi-level manufacturing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables accurate detection and feedback of focus and dose deviations, improving the precision of lithography processes and enabling better control over feature dimensions, thereby enhancing the manufacturing of semiconductor devices.
Implementation Method 1
positioning a patterned mask between a semiconductor workpiece and an energy source to expose portions of a photosensitive material deposited on the workpiece, transferring the mask pattern to the photosensitive material
Implementation Method 2
The lithography mask includes a plurality of first test patterns having a first phase shift and at least one plurality of second test patterns having at least one second phase shift
Data Source
AI summary
Test structures and methods for semiconductor devices, lithography systems, and lithography processes are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes using a lithography system to expose a layer of photosensitive material of a workpiece to energy through a lithography mask, the lithography mask including a plurality of first test patterns having a first phase shift and at least one plurality of second test patterns having at least one second phase shift. The layer of photosensitive material of the workpiece is developed, and features formed on the layer of photosensitive material from the plurality of first test patterns and the at least one plurality of second test patterns are measured to determine a optimal focus level or optimal dose of the lithography system for exposing the layer of photosensitive material of the workpiece.