Phase-Shifted Clock Transmission for EMI Reduction

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Solution Overview

Problem

Conventional spread spectrum clock generators in transmitting devices result in large circuit sizes and increased semiconductor chip area due to the need for complex noise reduction mechanisms, which are inefficient in reducing electromagnetic interference (EMI) noise effectively.

Innovation Solution

A transmitting device that generates and transmits a clock intermittently phase-shifted, eliminating the need for a spread spectrum clock generator, and includes a phase-shift announcement command to synchronize data transmission, thereby reducing EMI noise without increasing circuit size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If a spread spectrum clock generator (SSCG) is used to reduce EMI noise, then EMI noise is reduced, but the circuit size increases

Engineering Contradiction:
ImproveEMI noiseVSAvoidcircuit size
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the SSCG component from the transmitting device while maintaining EMI noise reduction functionality through alternative means (phase shifting and frequency modulation of the clock signal without requiring a dedicated spread spectrum clock generator circuit)

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the clock signal parameters (frequency and phase) over time to achieve spread spectrum effects and EMI reduction without requiring the complex SSCG circuitry. The clock frequency is modulated within a predetermined range to distribute spectral energy

Inventive Principle:
Principle #35Parameter changes

2Object-affected harmful factors

If a spread spectrum clock generator (SSCG) is used to reduce EMI noise, then EMI noise is reduced, but the semiconductor chip area increases

Engineering Contradiction:
ImproveEMI noiseVSAvoidsemiconductor chip area
Core Design Contradiction:
Object-affected harmful factorsVSArea of stationary object

Solution Approach 1:

The patent removes the SSCG component from the semiconductor integrated circuit, thereby reducing the chip area required while achieving EMI noise reduction through software-controlled or simplified hardware mechanisms that do not require dedicated spread spectrum clock generation circuitry

Inventive Principle:
Principle #2Taking out (Extraction)

3Object-affected harmful factors

If the clock frequency is modulated to extend bandwidth and reduce peak intensity, then EMI noise is reduced, but the circuit complexity increases

Engineering Contradiction:
ImproveEMI noiseVSAvoidcircuit complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent implements frequency and phase modulation of the clock signal within a predetermined range to achieve spread spectrum effects. This approach distributes the clock signal's spectral energy across a wider bandwidth, reducing peak intensity and EMI noise without requiring complex SSCG circuitry

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs periodic phase shifting and frequency modulation of the clock signal at controlled intervals. This periodic variation in clock parameters achieves EMI reduction by preventing continuous high-frequency energy concentration while maintaining data transmission synchronization

Inventive Principle:
Principle #19Periodic action

Data Source

PatentEP2506433B1Transmitting device, receiving device and transmitting/receiving system
Publication Date: 2019.08.07 THINE ELECTRONICS
  • EP2506433B1 patent drawingFigure 1
  • EP2506433B1 patent drawingFigure 2
  • EP2506433B1 patent drawingFigure 3

AI summary

A transmitting device 10A has a transmission data generating part 11 and an output buffer part 12A. The transmission data generating part 11 transmits a data 1 and a clock 1, which are to be transmitted to a receiving device, and outputs them to the output buffer part 12A. The output buffer part 12A includes a data transmitting part 13 and a clock transmitting part 14A. The clock transmitting part 14A generates and transmits a clock intermittently phase-shifted. The data transmitting part 13 transmits the data in sync with the clock transmitted from the clock transmitting part 14A.