Optical Encoder Interpolation Circuit for High Accuracy With Four Comparators
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Solution Overview
Problem
Conventional optical encoders face challenges in achieving high positioning accuracy while maintaining low power consumption and silicon area usage, as increasing the interpolation factor requires more comparators, leading to increased power consumption and larger area occupation, which can degrade detection accuracy.
Innovation Solution
The optical encoder employs an interpolation circuit with only four comparators, utilizing a phase shifter circuit, multiplexers, and digital circuits to generate and selectively couple phase-shifted signals, allowing for high interpolation factors without increasing the number of comparators, thus reducing power consumption and silicon area while maintaining high accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of comparators is increased to achieve higher positioning accuracy, then measurement precision is improved, but power consumption and silicon area increase
Solution Approach 1:
The interpolation process is divided into multiple stages using multiplexers to sequentially present different signal pairs to the same four comparators. This segmentation in time domain allows achieving high interpolation accuracy without proportionally increasing the number of comparators, thus reducing power consumption while maintaining measurement precision.
Solution Approach 2:
The same four comparators are made universal by using multiplexers to route different phase-shifted signal pairs to them sequentially. Each comparator performs multiple comparison functions across different interpolation stages, eliminating the need for dedicated comparators for each interpolation level and significantly reducing overall power consumption.
2Measurement precision
If the number of comparators is increased to achieve higher positioning accuracy, then measurement precision is improved, but silicon area increases
Solution Approach 1:
The interpolation function is segmented into sequential processing stages controlled by multiplexers, allowing the same physical comparators to serve multiple interpolation levels. This temporal segmentation reduces the need for spatial multiplication of comparator circuits, thereby reducing silicon area while achieving high positioning accuracy.
Solution Approach 2:
Four comparators are designed to perform multiple comparison functions by receiving different phase-shifted signal pairs through multiplexer routing. This multi-functionality allows a single set of comparators to achieve high interpolation accuracy that would traditionally require many more comparators, significantly reducing silicon area occupation.
3Measurement precision
If more comparators are used for high interpolation factor, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The circuit uses four universal comparators that can handle multiple comparison tasks through multiplexer control, rather than requiring dedicated comparators for each interpolation level. This universality simplifies the overall circuit architecture by reducing the number of comparator units and their associated control logic, thereby reducing device complexity while maintaining high detection accuracy.
Solution Approach 2:
Multiplexers are introduced as intermediary components that manage the routing of phase-shifted signals to the comparators. These intermediaries centralize the control function, allowing a single set of comparators to perform multiple interpolation-level comparisons without requiring complex direct interconnections between numerous comparators, thus reducing overall circuit complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables high positioning accuracy with low power consumption and silicon area usage, even at high interpolation factors, significantly improving efficiency compared to conventional circuits by using multiplexers and digital circuits to manage phase-shifted signals effectively.
Implementation Method 1
a phase shifter circuit, a first multiplexer, a second multiplexer, a first comparator, a second comparator, a first digital circuit
Implementation Method 2
The first multiplexer is configured to receive 2N phase shifted signals among the 4N phase shifted signals from the phase shifter circuit
Implementation Method 3
The first comparator is configured to receive a first pair of phase shifted signals via the first multiplexer to generate a first comparison signal
Data Source
AI summary
There is provided an interpolation circuit of an optical encoder including a phase shifter circuit, two multiplexers, two digital circuits and four comparators. The phase shifter circuit receives signals sequentially have a 90 degrees phase shift and outputs multiple phase shifted signals. Each of the two multiplexers receives a half of the multiple phase shifted signals and outputs two pairs of phase shifted signals, each pair having 180 degrees phase difference, respectively to two comparators connected thereto. Each of the two digital circuits controls the corresponding multiplexer to select the two pairs of phase shifted signals from the half of the multiple phase shifted signals.