Phase-Shifted Sampling Equalization for Lower-Bandwidth ADCs
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
High-cost large-bandwidth analog-to-digital converters (ADCs) are required for phase-shifted sampling modules to digitize signals with large bandwidths, necessitating a cost-effective solution while maintaining signal quality.
Innovation Solution
A phase-shifted sampling module comprising a primary sampler module, ADC module, and equalization module, where the primary sampler module reduces the bandwidth of the analog input signal, allowing for the use of lower-bandwidth ADCs, and the equalization module compensates for transfer function mismatches between signal paths using linear periodic time-variant filters.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If large-bandwidth ADCs are used to digitize signals with large bandwidths in phase-shifted sampling modules, then signal quality is maintained, but production costs increase
Solution Approach 1:
The sampling system is divided into multiple parallel signal paths, each handling a portion of the total bandwidth. By segmenting the bandwidth across multiple lower-bandwidth ADCs rather than using a single high-bandwidth ADC, the system achieves the same overall sampling capability while reducing individual component costs and complexity.
Solution Approach 2:
An equalization module is introduced as an intermediary component between the ADCs and the final signal processing stage. This equalization module compensates for transfer function mismatches between parallel signal paths, enabling the use of lower-bandwidth ADCs while maintaining signal quality through active correction of path imbalances.
2Productivity
If multiple ADCs are used to achieve high sampling rates exceeding single ADC capabilities, then sampling rate is improved, but device complexity increases
Solution Approach 1:
Multiple parallel signal paths with lower-bandwidth ADCs are merged to achieve the equivalent performance of a single high-bandwidth ADC. The combining process integrates the output of multiple ADCs through the equalization module, achieving high sampling rates while distributing the complexity across manageable parallel components rather than concentrating it in a single complex ADC.
Solution Approach 2:
The system employs dynamic equalization where the equalization module actively adjusts and compensates for transfer function mismatches between parallel signal paths in real-time. This dynamic adaptation allows the system to maintain optimal performance across varying operating conditions while using simpler, lower-bandwidth ADCs in each path.
Data Source
Figure 1
Figure 2
Figure 3
AI summary
A phase-shifted sampling module (10) is described. The phase-shifted sampling module (10) comprises a primary sampler module (12), an ADC module (14), and an equalization module (16). The primary sampler module (12) comprises an analog signal input (18), a first signal path (20), and a second signal path (22). The equalization module (16) comprises a primary sampler equalizer sub-module (34). The primary sampler equalizer sub-module (34) is configured to compensate a mismatch between a transfer function associated with the first signal path (20) and a transfer function associated with the second signal path (22). Further, a method for determining filter coefficients of an equalization module (16) of a phase-shifted sampling module (10) is described.