Switched Reactance Phase Shifter Timing for Glitch Mitigation
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Solution Overview
Problem
Conventional phase shifter circuits experience undesirable RF switching transients, or 'glitches', during phase state changes, which lead to significant variations in insertion loss and actual insertion phase.
Innovation Solution
The phase shifter cell and multiple coupled phase shifter cells mitigate glitches by controlling the timing of switching for each reactance element within a phase shifter cell, using a 'make before break' timing scheme for multi-state phase shifter cells, and arranging the timing of each phase shifter cell in multiple coupled cells such that individual cells do not all switch at the same time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional phase shifter circuits switch phase states using simultaneous switching of reactance elements, then the phase shift state changes quickly, but RF switching transients or glitches occur causing significant variations in insertion loss and phase
Solution Approach 1:
The patent applies preliminary action by introducing a through-path state that is activated before the final phase shift state. When transitioning from a first phase shift state to a second phase shift state, the circuit first switches to a through-path state (where the through-path switch is closed and phase shift switches are open), then transitions to the target phase shift state. This two-step process prevents direct switching between phase states, eliminating RF glitches and maintaining signal stability throughout the transition.
2Measurement precision
If multiple phase shifter cells are coupled to provide multiple phase shift states, then the phase resolution is improved, but the complexity of coordinating switch timing increases
Solution Approach 1:
The patent segments the phase transition process into distinct states: a first phase shift state, a through-path state, and a second phase shift state. Each phase shifter cell in the multi-cell configuration independently follows this segmented transition pattern. By dividing the transition into discrete, manageable states with clear switch configurations, the patent simplifies the coordination of switch timing across multiple cells while maintaining high phase resolution.
3Loss of time
If reactance elements switch simultaneously to change phase state, then the transition is fast, but insertion loss glitch amplitude increases
Solution Approach 1:
The patent introduces a through-path state as an intermediary between the first and second phase shift states. This intermediary state acts as a mediator that the circuit passes through during transitions, preventing direct switching between phase states. The through-path state with its closed through-path switch and open phase shift switches serves as a buffer that eliminates the harmful interaction between simultaneously switching reactance elements, thereby reducing insertion loss glitch amplitude while maintaining acceptable transition duration.
Data Source
AI summary
A phase shifter cell and multiple coupled phase shifter cells that mitigate signal glitches arising from phase state changes by a combination of design architecture and control signal timing. Specifically, one or more of the following three concepts are employed to mitigate insertion loss glitches and control phase behavior during phase state transitions: the timing of switching for each switched half-cell (e.g., including series and/or shunt reactance elements, such as inductors and/or capacitors) within a phase shifter cell is controlled in such a way that the reactance elements do not all switch at the same time; use of a “make before break” timing scheme for combination or “multi-state” phase shifter cells; and/or arranging the timing of each phase shifter cell in a set of multiple coupled phase shifter cells such that the individual cells do not all switch at the same time.