Phase Shifter Patch Antenna Stack for Lower Dielectric Loss
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Solution Overview
Problem
Existing electronic devices with antenna capabilities face limitations in performance and operational reliability due to inadequate structural designs, particularly in terms of dielectric loss and temperature-induced material deterioration.
Innovation Solution
The electronic device incorporates a phase shifter on a first substrate, a patch on a second substrate, a dielectric layer between the common electrode layer and the second substrate, and a thickness of the dielectric layer greater than or equal to 5 μm, which reduces dielectric loss and improves operational reliability by minimizing temperature-induced damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If a thin dielectric layer is used between the common electrode layer and the second substrate, then the device thickness is reduced, but dielectric loss increases and operational reliability deteriorates
Solution Approach 1:
The patent specifies a minimum thickness parameter for the dielectric layer (greater than or equal to 5 μm) to optimize the balance between device compactness and performance. This parameter change ensures sufficient dielectric strength and loss characteristics while maintaining reasonable device thickness.
Solution Approach 2:
The patent employs a composite structure consisting of the dielectric layer in conjunction with the common electrode layer and patches. This composite material approach allows the dielectric layer to provide both mechanical support and electrical isolation functions, optimizing overall device performance while managing thickness constraints.
2Volume of moving object
If a thin dielectric layer is used between the common electrode layer and the second substrate, then the device thickness is reduced, but operational reliability deteriorates due to substrate cracks and material deterioration
Solution Approach 1:
The patent establishes a minimum thickness threshold (≥5 μm) for the dielectric layer to prevent mechanical failure modes such as substrate cracks and material deterioration. This parameter specification ensures adequate mechanical strength and thermal stability while maintaining device compactness.
Solution Approach 2:
The dielectric layer serves as a protective cushioning layer between the common electrode layer and the second substrate, preventing direct mechanical contact and potential damage. This prior cushioning approach mitigates the risk of substrate cracks and material deterioration before they can occur during operation or processing.
3Loss of energy
If the dielectric layer thickness is increased, then dielectric loss is reduced and reliability is improved, but the device thickness increases
Solution Approach 1:
The patent optimizes the dielectric layer thickness by specifying it should be greater than or equal to 5 μm but less than or equal to the second substrate thickness. This parameter range achieves the optimal balance between reducing dielectric loss and maintaining acceptable device thickness for practical applications.
4Reliability
If the dielectric layer thickness is increased, then operational reliability is improved by minimizing temperature-induced damage, but the device thickness increases
Solution Approach 1:
The patent specifies that the dielectric layer thickness should be greater than or equal to 5 μm to provide sufficient thermal stability and resistance to temperature-induced damage. This parameter optimization ensures reliable operation under thermal stress while controlling overall device thickness within acceptable limits.
Data Source
AI summary
An electronic device is provided, including: a first substrate, a plurality of phase shifters, a second substrate, a plurality of patches, a common electrode layer, and a dielectric layer. The plurality of phase shifters are disposed on the first substrate. The second substrate is disposed opposite to the first substrate. The plurality of patches are disposed on the second substrate. The dielectric layer is disposed between the common electrode layer and the second substrate and on the plurality of patches. In addition, a thickness of the dielectric layer is greater than or equal to 5 μm and less than or equal to a thickness of the second substrate.


