Digital Phase Shifter Row Layout for Low-Frequency Phase Range
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Solution Overview
Problem
Conventional digital phase shifters face challenges in achieving a sufficient difference in phase shift between low-delay and high-delay modes, particularly at low frequencies, due to limitations in inductance value adjustment, which affects their performance in 5G communication networks using phased array antennas.
Innovation Solution
The digital phase shifter design includes multiple digital phase shift circuits connected in cascade, with specific configurations such as parallel rows and modified circuits with loop ground conductors, to enhance inductance value during high-delay mode, ensuring increased phase shift differences between modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If an analog phase shifter is used, then the phase can be shifted continuously, but the insertion loss is high and the bandwidth is limited
Solution Approach 1:
The patent replaces the analog mechanical phase shifter with a digital signal processing system. The phase shifter comprises a delay element, accumulator, and output stage that perform phase shifting through digital computation rather than analog signal manipulation. This substitution eliminates the high insertion loss and bandwidth limitations inherent in analog implementations while maintaining continuous phase shifting capability through programmable control.
Solution Approach 2:
The patent changes the fundamental operating parameters from analog continuous voltage control to digital discrete sample control. By converting the input signal to digital form and using integer-based delay and accumulation operations, the system achieves phase shifting with low loss and extended bandwidth. The phase shift amount is controlled by changing digital parameters (delay value and accumulation count) rather than analog voltages.
2Adaptability or versatility
If an analog phase shifter is used, then the phase can be shifted continuously, but the circuit complexity increases and performance degrades at higher frequencies
Solution Approach 1:
The patent replaces complex analog circuitry with a streamlined digital processing chain consisting of a delay element, accumulator, and output stage. This digital implementation reduces circuit complexity by eliminating numerous analog components (variable capacitors, inductors, resistors) while achieving the same phase shifting function through simpler digital operations that are easier to manufacture and control.
3Measurement precision
If a digital phase shifter with large delay is used to achieve 360-degree phase shift, then the phase resolution is improved, but the group delay variation increases
Solution Approach 1:
The patent implements a dynamic phase shifting mechanism where the delay element and accumulator work together to provide continuous phase adjustment. The system can dynamically change the delay value and accumulation count to achieve any desired phase shift from 0 to 360 degrees. This dynamic operation allows the system to maintain constant group delay while achieving fine phase resolution, as the phase shift is achieved through the combination of delay and accumulation rather than large fixed delays.
Data Source
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AI summary
A digital phase shifter includes a first row, a second row arranged to extend in parallel to the first row, and a connection unit electrically connecting one ends of the first and second rows. Each of the first and second rows is configured by connecting a plurality of digital phase shift circuits in cascade, and each digital phase shift circuit includes an outer line and the like. For the digital phase shift circuits adjacent to each other in each of the first and second rows, outer lines adjacent to each other are separated, a first ground conductor and a second ground conductor adjacent to each other are separated, and positional relationships of the outer line to a signal line are reversed. A plurality of the outer lines included in the first row are not adjacent to a plurality of the outer lines included in the second row.