Phase Step Clock Generator for PLL Bandwidth Testing
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Solution Overview
Problem
Integrated circuit manufacturers lack access to programmable testers for effectively testing the bandwidth of clock circuits with phase-lock loops, necessitating an improved method for determining bandwidth without relying on test pattern generation.
Innovation Solution
Incorporating a phase step generator within the integrated circuit, which generates an input clock signal based on a reference clock signal and extends its phase by inserting a phase step, allowing the clock circuit to relock and measure phase differences to determine bandwidth, eliminating the need for a programmable tester and enhancing signal integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a programmable tester is used to generate test patterns for bandwidth testing, then measurement precision is improved, but device complexity and ease of manufacture worsen due to requiring external specialized equipment
Solution Approach 1:
The phase step generator is integrated within the integrated circuit itself, allowing the device to perform its own bandwidth testing without requiring external programmable testers. The phase step generator generates test signals internally by inserting phase steps into the reference clock signal, and the clock circuit measures the phase differences to determine bandwidth, making the system self-testing and eliminating complex external equipment requirements
Solution Approach 2:
The testing functionality is merged with the operational clock circuit components. The phase step generator uses the same reference clock signal and clock circuit that are already present in the integrated circuit, combining the operational and testing functions into a single integrated system rather than requiring separate external testing equipment
2Device complexity
If the phase step generator uses the feedback clock signal for generating the input clock signal, then device complexity is reduced, but reliability worsens due to potential signal integrity issues
Solution Approach 1:
The phase step generator extracts the reference clock signal directly from the clock circuit's reference input rather than using the feedback clock signal. This separation ensures that the input clock signal generation is independent of the feedback path, maintaining signal integrity and avoiding potential contamination or degradation that could occur if the feedback signal were reused
3Ease of operation
If traditional testing methods are used requiring external testers, then ease of operation is maintained, but productivity worsens due to additional testing steps and equipment setup
Solution Approach 1:
The integrated circuit performs bandwidth testing autonomously through its internal phase step generator, eliminating the need for external tester setup, programming, and operation. The device can self-test its bandwidth characteristics by internally generating phase steps and measuring the resulting phase differences, significantly improving testing productivity while maintaining operational simplicity
Data Source
AI summary
An integrated circuit includes a phase step generator and a clock circuit. The phase step generator generates an input clock signal based on a reference clock and the clock circuit generates an output clock signal based on the input clock signal. Additionally, the clock circuit generates a feedback clock signal based on the output clock signal and locks a phase of the feedback clock signal with a phase of the input clock signal. In response to an assertion of a trigger signal, the phase step generator extends a phase of the input clock signal by inserting a phase step into the reference clock signal. A bandwidth of the clock circuit is determined based on the output clock signal after assertion of the trigger signal.