Phased Array Antenna Strobe Latching for Faster Beam Switching

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Solution Overview

Problem

Existing phased array antenna modules suffer from prolonged transition times due to latency in decoding circuits and restrictions on strobe latch signal timing, which hinder efficient beam pattern switching.

Innovation Solution

Incorporating a strobe mechanism portion between the digital and analog circuits to latch control signals at fixed states, along with a state determination portion to ensure timing accuracy, thereby eliminating latency and restrictions on strobe latch signal transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a strobe mechanism is used to control beam pattern switching, then the beam pattern can be switched, but the transition time is lengthened due to circuit latency

Engineering Contradiction:
Improvebeam pattern switching speedVSAvoidtransition time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-loading control data into a buffer memory before the strobe signal arrives. The digital controller prepares the control data in advance, and when the strobe signal is received, the pre-prepared data is immediately output to the analog circuit, eliminating the need for real-time data preparation and reducing transition time.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses a buffer memory to store control data in advance before it is needed. This allows the system to prepare control information ahead of time, so that when the strobe signal triggers the beam pattern switching, the control data is already ready and can be immediately transmitted, thereby reducing the overall transition time.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If a strobe mechanism is used for control, then beam pattern switching is enabled, but restrictions are imposed on the timing of transmitting the strobe latch signal

Engineering Contradiction:
Improvecontrol flexibilityVSAvoidstrobe latch signal timing restriction
Core Design Contradiction:
Adaptability or versatilityVSEase of operation

Solution Approach 1:

The patent introduces a buffer memory as an intermediary between the digital controller and the analog circuit. This buffer decouples the timing requirements, allowing the host controller to transmit the strobe latch signal at any convenient time without worrying about synchronization with the analog circuit's ready state. The buffer absorbs timing variations and ensures smooth data transfer.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If decoding circuit and SRAM are used for control signal processing, then control functionality is achieved, but latency is introduced that contributes to longer transition time

Engineering Contradiction:
Improvecontrol signal processing accuracyVSAvoiddecoding latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by performing control signal processing and data preparation in advance, before the actual beam pattern switching is triggered. The decoding circuit and SRAM are used to pre-process and store control data, so that when the strobe signal arrives, the processing is already complete or nearly complete, significantly reducing the observable latency during the actual transition.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12463340B2Phased array antenna module
Publication Date: 2025.11.04 FUJIKURA LTD
  • US12463340B2 patent drawing
  • US12463340B2 patent drawing
  • US12463340B2 patent drawing

AI summary

A phased array antenna module includes an analog circuit portion that adjusts at least one of an intensity and a phase of a signal transmitted or received by each of a plurality of antenna elements, a digital control portion that controls the analog circuit portion, a strobe mechanism portion that is provided between the analog circuit portion and the digital control portion, latches a control signal output from the digital control portion when a strobe latch signal is input, and outputs the control signal to the analog circuit portion, a state determination portion that determines whether or not the control signal is in a fixed state, and a timing adjustment portion that outputs the strobe latch signal to the strobe mechanism portion when a ready signal is output from the state determination portion.