Photo Mask With Patterned Opaque Regions For Single-Step Lithography
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Solution Overview
Problem
The manufacturing of thin film transistor array panels for display devices, such as LCDs and OLEDs, requires multiple lithography steps, which are costly and time-consuming, and there is a need to reduce the number of these steps to enhance efficiency and reduce costs.
Innovation Solution
A photo mask with a translucent area and light blocking portions of varying sizes and shapes is used to control light exposure during the manufacturing process, allowing for the formation of gate lines, data lines, and storage capacitor conductors with reduced lithography steps by varying the light blocked by adjusting the interval and width of light blocking portions, enabling precise etching of insulating layers and formation of pixel electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple lithography steps are used to form gate lines, data lines, and electrodes, then manufacturing precision is improved, but the number of process steps increases and productivity decreases
Solution Approach 1:
The patent combines multiple lithography steps into a single lithography step by using a transparent substrate with patterned opaque regions that define multiple conductive layers (gate line, data line, electrode) simultaneously. This merging approach maintains manufacturing precision while significantly improving productivity by reducing the number of sequential process steps.
Solution Approach 2:
The invention transitions from a single-layer lithography approach to a three-dimensional structured transparent substrate where opaque regions are arranged in specific patterns to define multiple conductive layers. This dimensional approach allows one lithography step to create multiple patterns that would traditionally require separate steps.
2Manufacturing precision
If multiple lithography steps are used, then manufacturing precision is improved, but manufacturing cost increases
Solution Approach 1:
By merging multiple lithography steps into one using a patterned transparent substrate, the patent reduces material consumption (photoresist, solvents), equipment usage time, and labor costs associated with multiple sequential processes, thereby lowering overall manufacturing cost while maintaining precision through the pre-designed opaque patterns.
3Manufacturing precision
If multiple lithography steps are used, then manufacturing precision is improved, but manufacturing time increases
Solution Approach 1:
The patent merges multiple lithography operations into a single exposure step using a transparent substrate with pre-patterned opaque regions. This eliminates the need for repeated photoresist coating, exposure, and development cycles, dramatically reducing manufacturing time while the precise arrangement of opaque regions ensures accurate formation of all conductive layers in one go.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method simplifies the manufacturing process by reducing the number of lithography steps, lowering costs and time, while ensuring accurate formation of conductive layers and electrodes, thereby improving the efficiency and reliability of the TFT array panel production.
Implementation Method 1
forming a photoresist including a first portion and a second portion to be thinner than the first portion on the second insulating layer by exposing it to light through a photo mask and developing
Data Source
AI summary
A method for manufacturing a thin film transistor array panel using a photo mask is provided. The photo mask includes: a transmitting area and a translucent area, wherein the translucent area includes a plurality of light blocking portions blocking light, and wherein the light blocking portions have a plurality of areas blocking different amounts of light. By using this type of photo mask, a substantially flat layer of photoresist film can be deposited even on top of an uneven surface to manufacture a thin film transistor array panel. The flat photoresist film reduces processing cost and enhances the reliability of the panel manufacturing process.


