Photo Mask Sub-Resolution Patterns for Lithography Focus Margins

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Solution Overview

Problem

As semiconductor technology advances to smaller node sizes, lithography operations face challenges such as reduced focus margins, increased lens aberration effects, and lower pattern fidelity, particularly at 10 nm or smaller node sizes, due to limitations in current DUV and EUV lithography techniques, which require complex mask designs and large data volumes for photo mask production.

Innovation Solution

The introduction of sub-resolution patterns and dummy patterns on photo masks, which are designed to improve lithography process margins by creating pseudo line-and-space patterns with constant pitches, reducing the impact of lens aberrations and simplifying mask design by inserting sub-resolution patterns between main patterns and adjusting gap dimensions, thereby enhancing focus margins and preventing line-end shortening.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If sub-resolution patterns and dummy patterns are added to photo masks, then lithography process margins and focus margins are improved, but mask design complexity and data volume increase

Engineering Contradiction:
Improvelithography process marginsVSAvoidmask design complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by pre-calculating and pre-positioning sub-resolution patterns and dummy patterns during mask design. These patterns are inserted between main patterns before lithography, creating a prepared configuration that automatically compensates for lens aberrations and improves focus margins during the actual lithography process without requiring real-time adjustments.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses sub-resolution patterns and dummy patterns as intermediary elements between main patterns. These intermediary patterns mediate the interaction between light and main patterns, reducing lens aberration effects and improving pattern fidelity. The sub-resolution patterns act as mediators that fill gaps and reduce sensitivity to focus variations, while dummy patterns serve as mediators to equalize pitch and improve overall lithography margins.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If sub-resolution patterns are inserted between main patterns, then line-end shortening is prevented and pattern fidelity is improved, but manufacturing time and process complexity increase

Engineering Contradiction:
Improvepattern fidelityVSAvoidmanufacturing time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-positioning sub-resolution patterns between main patterns during mask design. This preliminary configuration ensures that when lithography occurs, the patterns are already in place to prevent line-end shortening and improve pattern fidelity, eliminating the need for post-lithography adjustments or rework.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements beforehand cushioning by inserting sub-resolution patterns that act as buffer elements between main patterns. These patterns provide a cushioning effect that compensates for potential line-end shortening and focus variations during lithography, protecting the main patterns from defects before they can occur.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Manufacturing precision

If complex mask designs are used to address lens aberration, then pattern fidelity improves, but photo mask production becomes more difficult and time-consuming

Engineering Contradiction:
Improvepattern fidelityVSAvoidphoto mask production
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent applies preliminary action by pre-calculating the optimal positions and dimensions of sub-resolution and dummy patterns during the mask design phase. This preliminary configuration simplifies the actual mask manufacturing process, as the patterns are already positioned correctly to address lens aberrations, reducing the need for complex adjustments during production.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses parameter changes by systematically varying the dimensions, positions, and spacing of sub-resolution and dummy patterns to optimize lithography performance. By adjusting these parameters during mask design, the patent creates a configuration that improves pattern fidelity while maintaining ease of manufacture through standardized design rules and automated pattern generation.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The use of sub-resolution and dummy patterns improves lithography margins by reducing the sensitivity of main patterns to lens aberrations and simplifying mask design, resulting in improved focus margins and reduced line-end shortening, even at smaller node sizes.

Implementation Method 1

The photo resist layer is exposed with actinic radiation through the photo mask by using an optical lithography tool

Methodology Applied
Scientific EffectPhotoresist exposure: Photopolymerisation

Data Source

PatentUS11294286B2Pattern formation method using a photo mask for manufacturing a semiconductor device
Publication Date: 2022.04.05 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11294286B2 patent drawing
  • US11294286B2 patent drawing
  • US11294286B2 patent drawing

AI summary

A photo mask for manufacturing a semiconductor device includes a first pattern extending in a first direction, a second pattern extending in the first direction and aligned with the first pattern, and a sub-resolution pattern extending in the first direction, disposed between an end of the first pattern and an end of the second pattern. A width of the first pattern and a width of the second pattern are equal to each other, and the first pattern and the second pattern are for separate circuit elements in the semiconductor device.