Photoactive Via Patterning Using Barrier Layers
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Solution Overview
Problem
The scaling of via features in integrated circuits poses challenges due to limitations in lithographic equipment resolution and photoresist materials, particularly at pitches below 70 nanometers and critical dimensions below 35 nanometers, leading to issues with overlay control, line width roughness, and critical dimension uniformity, which are not adequately addressed by current EUV lithographic scanners.
Innovation Solution
The implementation of a substrate with pre-patterned features that are filled with a photoresist material, where a conformal barrier layer, such as a self-assembled monolayer or polymer brush, is used to prevent substrate poisoning and reduce the dosage of photoactive components, allowing for the formation of conductive vias without requiring high-resolution lithography.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional lithographic processes are used to pattern small vias, then the process is simple and well-established, but the resolution and overlay control deteriorate at pitches below 70 nm and critical dimensions below 35 nm
Solution Approach 1:
The patent segments the lithographic patterning into two distinct steps: first forming mandrels at relaxed pitch, then using spacer deposition to create the final fine-pitch features. This segmentation allows each step to operate at optimal resolution, with the spacer step achieving sub-35 nm critical dimensions without requiring high-resolution lithography
Solution Approach 2:
The patent performs preliminary actions by first forming the mandrel structures and spacer layers before the final via patterning. The spacer material is deposited and patterned in advance, creating a self-aligned mask that defines the final via locations with high precision, eliminating the need for complex overlay control in subsequent steps
2Manufacturing precision
If photoresist materials with high photoactive component dosage are used to improve patterning at small dimensions, then the patterning capability improves, but substrate poisoning increases and photoresist solubility deteriorates
Solution Approach 1:
The patent introduces a barrier layer as an intermediary between the substrate and the photoresist material. This barrier layer prevents direct interaction between the photoactive components and the substrate, eliminating substrate poisoning while allowing high photoactive component dosage in the photoresist to maintain patterning precision at small dimensions
Solution Approach 2:
The patent applies different material properties to different regions: the barrier layer is applied specifically at the substrate interface where poisoning occurs, while the photoresist material can have high photoactive component concentration in regions where patterning is needed. This localized application of protective and functional materials optimizes both precision and chemical compatibility
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of tightly pitched features beyond the limits of standard BEOL lithography equipment, improving throughput and reducing the need for multiple masks, while maintaining effective photoresist solubility and minimizing substrate interactions.
Implementation Method 1
a conformal barrier layer, such as a self-assembled monolayer or polymer brush, is used to prevent substrate poisoning
Implementation Method 2
the photoresist layer may be exposed to patterned actinic radiation through a patterned mask
Data Source
AI summary
Embodiments of the invention include microelectronic devices and methods of forming such devices. In an embodiment, a microelectronic device, includes one or more pre-patterned features formed into a interconnect layer, with a conformal barrier layer formed over the first wall, and the second wall of one or more of the pre-patterned features. A photoresist layer may formed over the barrier layer and within one or more of the pre-patterned features and a conductive via may be formed in at least one of the pre-patterned features.