Photodetection Pixel ADC Timing for Lower Power Conversion
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Solution Overview
Problem
Existing analog to digital converters (ADCs) in photodetection elements require power reduction to enhance energy efficiency.
Innovation Solution
A photodetection element with parallel operation of multiple pixels, including a comparison unit, signal accumulation, detection, amplification, storage, and control units, and a timing generator with positive feedback circuits, allowing for reduced power consumption through efficient signal processing and storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If an ADC is provided on the signal reading side of a photodetection element, then signal conversion capability is improved, but power consumption increases
Solution Approach 1:
The photodetection element is divided into multiple independent pixels, each with its own ADC performing parallel conversion. This segmentation allows each pixel to operate independently with lower power consumption while maintaining overall system conversion capability.
Solution Approach 2:
The ADC performs analog-to-digital conversion at specific timing points (when comparison results invert) rather than continuously. This periodic action reduces power consumption by activating the ADC only when necessary, while still capturing all relevant signal changes.
2Productivity
If multiple pixels operate in parallel with individual ADCs, then signal processing capability is improved, but device complexity increases
Solution Approach 1:
The comparison unit and ADC structure are designed as universal modules that can be replicated across multiple pixels. Each pixel uses the same comparison circuitry and conversion mechanism, simplifying design while enabling parallel operation. The signal accumulation floating unit also serves multiple functions by holding comparison results for subsequent ADC conversion.
Solution Approach 2:
The comparison unit and signal accumulation function are merged into a single integrated structure. The comparison unit compares analog signals and the accumulation floating unit holds the result, combining two functions in one module to reduce overall device complexity while maintaining parallel processing capability.
3Use of energy by moving object
If ADC power is reduced, then power consumption decreases, but conversion accuracy may deteriorate
Solution Approach 1:
The comparison unit performs preliminary comparison of analog signals before ADC conversion, preparing the signal in advance. The comparison result is stored in the accumulation floating unit, allowing the ADC to convert only when necessary. This preliminary action ensures accurate conversion while reducing ADC activation frequency and power consumption.
Solution Approach 2:
The system uses feedback from the comparison unit to control ADC operation. When the comparison result inverts, this feedback triggers ADC conversion. This feedback mechanism ensures the ADC operates at the optimal moment for accurate conversion while minimizing unnecessary conversions and power consumption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves significant power reduction in ADCs by optimizing signal processing and storage, enabling efficient operation of photodetection elements.
Implementation Method 1
a plurality of pixels, in which each of the plurality of pixels includes: a physical signal acquisition unit that acquires a physical signal
Data Source
AI summary
To reduce power consumption. A photodetection element includes a plurality of pixels, in which each of the plurality of pixels includes: a physical signal acquisition unit that acquires a physical signal; a comparison unit that compares a physical signal acquired by the physical signal acquisition unit with a reference signal; a signal accumulation floating unit that is electrically connected to one end of the comparison unit; a signal detection unit that is electrically connected to the signal accumulation floating unit and detects a comparison result of the comparison unit; a signal amplification unit that amplifies a detection result of the signal detection unit; a signal storage unit that stores a time code; a signal input/output unit that inputs and outputs a time code; and a signal control unit that performs control to store a time code output from the signal input/output unit in the signal storage unit on the basis of the comparison result, and outputs, to the signal input/output unit, a time code of the time when the comparison result is inverted, the time code being stored in the signal storage unit, and at least two or more of the pixels operate in parallel.