Photodetector Isolation Structure for Dark Current Suppression
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Solution Overview
Problem
In solid-state imaging devices, the miniaturization of pixels leads to increased deterioration of white spot and dark current characteristics due to dielectric polarization in the element isolation region caused by the fringe electric field when field effect transistors are driven, especially as the width of the element isolation region decreases.
Innovation Solution
Incorporating a conductive film within the element isolation region of the semiconductor layer, with a second insulating film overlapping the conductive film, to shield the fringe electric field and prevent electron induction at the interface between the photoelectric converter and the semiconductor layer, thereby securing pinning and reducing electrical conduction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the element isolation region width is decreased to achieve pixel miniaturization, then the pixel size is reduced and integration density is improved, but the dielectric polarization effect is enhanced causing deterioration of white spot and dark current characteristics
Solution Approach 1:
A conductive film is introduced as an intermediary component within the element isolation region, positioned between the photoelectric converter and the transistor. This conductive film acts as a mediator to control and reduce dielectric polarization effects, thereby suppressing electron induction at the interface and improving white spot and dark current characteristics while maintaining miniaturized pixel dimensions
Solution Approach 2:
The electrical parameters of the element isolation region are modified by introducing a conductive film with specific conductivity characteristics. This changes the electrical field distribution and reduces dielectric polarization effects, allowing the element isolation region to function effectively at reduced widths while maintaining reliable device operation
2Device complexity
If the element isolation region width is decreased, then manufacturing cost and device complexity are reduced, but the fringe electric field effect is enhanced causing electron induction and pinning release
Solution Approach 1:
The conductive film serves as an intermediary that modifies the electric field distribution within the element isolation region. By positioning this conductive layer strategically, the fringe electric field effects are controlled and electron induction at critical interfaces is suppressed, achieving reliable device performance with simplified miniaturized structures
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses the deterioration of white spot and dark current characteristics, even as pixel size decreases, by shielding the fringe electric field and enhancing insulation resistance between the transistor gate electrodes and the conductive film.
Implementation Method 1
the element isolation region includes a conductive film provided in a groove on the side of the first surface of the semiconductor layer with the first insulating film interposed therebetween, and a second insulating film provided on the side of the first surface of the semiconductor layer so as to overlap the conductive film
Data Source
AI summary
The present disclosure suppresses deterioration of white spot and dark current characteristics. A photodetector includes a semiconductor layer having a first surface and a second surface located opposite to each other and provided with an element isolation region on a side of the first surface, a photoelectric converter provided in the semiconductor layer, and a transistor provided adjacent to the photoelectric converter on the side of the first surface of the semiconductor layer across the element isolation region. Then, the element isolation region includes a conductive film provided in a groove on the side of the first surface of the semiconductor layer with the first insulating film interposed therebetween, and a second insulating film provided on the side of the first surface of the semiconductor layer so as to overlap the conductive film.