Photodetector Pad Isolation Ring for Lower Parasitic Capacitance

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Solution Overview

Problem

High-speed systems face challenges in suppressing the increase of parasitic capacitance at electrode pads, which affects performance and chip size reduction.

Innovation Solution

A photodetection device is designed with an insulating ring penetrating the semiconductor layer and surrounding the electrode pad, along with an insulating layer, to reduce parasitic capacitance, and an optical system to form images from a subject.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If the electrode pad is arranged on the outermost surface to reduce chip size, then the chip size can be reduced, but the parasitic capacitance of the electrode pad increases

Engineering Contradiction:
Improvechip sizeVSAvoidparasitic capacitance
Core Design Contradiction:
Volume of moving objectVSObject-affected harmful factors

Solution Approach 1:

An insulating ring structure is introduced as an intermediary element between the electrode pad and the semiconductor layer. This insulating ring penetrates the semiconductor layer and surrounds the electrode pad, effectively isolating the electrode pad from the semiconductor layer to reduce parasitic capacitance while maintaining the electrode pad's position on the outermost surface for reduced chip size

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The insulating structure is segmented into a ring shape that penetrates the semiconductor layer, creating multiple isolation zones. This segmented insulating ring structure effectively divides the electrical fields and reduces the parasitic capacitance between the electrode pad and the semiconductor layer while maintaining compact chip dimensions

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively suppresses parasitic capacitance, allowing for smaller chip sizes and improved signal speed by reducing wiring delays and RC delays, enhancing the reliability of wire bonding and image quality.

Implementation Method 1

it is necessary to suppress an increase in a parasitic capacitance, for example, parasitic capacitance of an electrode pad

Methodology Applied
Scientific EffectParasitic capacitance: Capacitance

Data Source

PatentUS20240175802A1Photodetection device and electronic device
Publication Date: 2024.05.30 SONY SEMICON SOLUTIONS CORP
  • US20240175802A1 patent drawing
  • US20240175802A1 patent drawing
  • US20240175802A1 patent drawing

AI summary

Provided is a photodetection device capable of suppressing an increase in a parasitic capacitance of an electrode pad. A photodetection device includes: a first semiconductor layer that includes a photoelectric conversion unit and has one surface being a light incident surface and another surface being an element formation surface; an insulating layer laminated on a side of the light incident surface of the first semiconductor layer; an electrode pad exposed from a surface of the insulating layer on a side opposite to a surface on a side of the first semiconductor layer in a state where the insulating layer is interposed between the electrode pad and the first semiconductor layer; and an insulating ring that is a ring having an insulating property, penetrating the first semiconductor layer in a thickness direction, and surrounding the electrode pad in a plan view.