Photodiode Carrier Frequency Response Equalization
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Solution Overview
Problem
The photodiode carrier in existing technologies exhibits differing frequency response characteristics among photodiodes connected to bias side electrodes of varying lengths, leading to inconsistent performance in optical high frequency receiving circuits.
Innovation Solution
A photodiode carrier design featuring a diode array connection region with signal and bias side electrodes, and condensers connected between these electrodes and the ground, ensuring that bias side electrodes are approximately equal in length from the diode array connection region, thereby equalizing frequency response characteristics across multiple photodiodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If bias side electrodes are drawn around with different lengths to connect to photodiodes, then all photodiodes can be connected to the carrier, but the frequency response characteristics differ between photodiodes connected to bias side electrodes of varying lengths
Solution Approach 1:
The patent applies local quality by making the bias side electrodes have uniform length from the diode array connection region to the upper surface, despite the need to connect to different photodiodes. This uniformity in a specific local characteristic (length) ensures consistent frequency response across all photodiodes while maintaining the ability to connect to multiple devices through the carrier's electrode arrangement.
2Reliability
If bias side electrodes are made equal in length from the diode array connection region, then frequency response characteristics are equalized among photodiodes, but the electrodes must be drawn around in a specific pattern
Solution Approach 1:
The patent employs asymmetry in the electrode layout by having bias side electrodes drawn around in a specific asymmetric pattern that ensures equal length from the diode array connection region. The electrodes extend and are drawn around differently positioned photodiodes, creating an asymmetric arrangement that achieves the symmetric goal of equal length and consistent frequency response characteristics.
3Reliability
If signal side electrodes extend to the upper surface to connect to photodiodes, then electrical connection is achieved, but parasitic inductance affects high frequency performance
Solution Approach 1:
The patent extracts the harmful effect of parasitic inductance by minimizing the extension length of signal side electrodes to the upper surface. The electrodes are designed to extend only as far as necessary to establish electrical connection with the photodiodes, removing unnecessary electrode length that would contribute to parasitic inductance and degrade high frequency performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design ensures equalized frequency response characteristics among photodiodes, enhancing the high-frequency response and reducing parasitic inductance, leading to improved performance and increased layout flexibility in optical receiver modules.
Implementation Method 1
Depending on the incident light to an optical receiver module, the quadruple photodiodes output the output signal
Implementation Method 2
first and second condensers connected between the electrode disposed on the way of the first and the second bias side electrodes and the ground electrode
Data Source
AI summary
Disclosed is a photodiode carrier which can equalize the frequency response characteristics of a plurality of mounted photodiodes. A photodiode carrier as disclosed includes a diode array connection region, first and second signal side electrodes connected to the diode array connection region, first and second bias side electrodes connected to the diode array connection region, and first and second condensers connected between the electrode disposed on the way of the first and the second bias side electrodes and the ground electrode, wherein the electrodes disposed on the way of the first and the second bias side electrodes are located in the about equal distance from the diode array connection region 7 as a start point.


