Photodiode Surface Layer Segmentation for Dark Current Reduction

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Solution Overview

Problem

Semiconductor devices, particularly CMOS image sensors, face challenges in reducing dark current and white defects during dark time due to surface-related issues, which existing manufacturing methods have not adequately addressed.

Innovation Solution

The semiconductor device incorporates a photodiode with a charge storage layer and a transfer transistor, featuring a surface layer with distinct sub-regions of varying impurity concentrations, where the low-concentration sub-region is closer to the gate electrode than the high-concentration sub-region, to suppress electron generation and enhance charge transfer efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a uniform impurity concentration is used in the surface layer, then the manufacturing process is simple, but dark current and white defects increase due to surface-related issues

Engineering Contradiction:
Improvedark current reductionVSAvoidsurface layer structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The surface layer is divided into two sub-regions with different impurity concentrations: a first sub-region with lower impurity concentration and a second sub-region with higher impurity concentration. This local differentiation allows the first sub-region to reduce surface-related dark current while the second sub-region maintains adequate charge transfer efficiency, resolving the contradiction between reliability and uniform manufacturing.

Inventive Principle:
Principle #3Local quality

2Reliability

If the low-concentration sub-region is positioned closer to the charge storage layer, then surface-related dark current is reduced, but charge transfer efficiency may be compromised

Engineering Contradiction:
Improvesurface defect reductionVSAvoidcharge transfer accuracy
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

Different sub-regions are assigned different impurity concentrations based on their functional requirements. The first sub-region closer to the charge storage layer uses lower impurity concentration to minimize surface defects and dark current, while the second sub-region uses higher impurity concentration to ensure adequate charge transfer efficiency, achieving both goals simultaneously.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The surface layer is segmented into multiple sub-regions with gradient impurity concentrations rather than using a uniform structure. This segmentation allows optimization of each sub-region's properties for its specific functional role, with the lower-concentration region handling surface-related reliability and the higher-concentration region supporting charge transfer precision.

Inventive Principle:
Principle #1Segmentation

3Manufacturing precision

If high impurity concentration is used throughout the surface layer, then charge transfer efficiency is maintained, but dark current and white defects increase

Engineering Contradiction:
Improvecharge transfer efficiencyVSAvoiddark current
Core Design Contradiction:
Manufacturing precisionVSObject-generated harmful factors

Solution Approach 1:

Instead of uniformly high impurity concentration, the invention uses locally differentiated concentrations where the first sub-region has lower impurity concentration to suppress dark current generation at the surface, while the second sub-region maintains higher impurity concentration to ensure charge transfer efficiency, thus eliminating the need for uniform high concentration.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10056420B2Semiconductor device and manufacturing method thereof
Publication Date: 2018.08.21 RENESAS ELECTRONICS CORP
  • US10056420B2 patent drawing
  • US10056420B2 patent drawing
  • US10056420B2 patent drawing

AI summary

Provided is a semiconductor device with improved performance. The semiconductor device includes a photodiode having a charge storage layer (n-type semiconductor region) and a surface layer (p-type semiconductor region), and a transfer transistor having a gate electrode and a floating diffusion. The surface layer (p-type semiconductor region) of a second conductive type formed over the charge storage layer (n-type semiconductor region) of a first conductive type includes a first sub-region having a low impurity concentration, and a second sub-region having a high impurity concentration. The first sub-region is arranged closer to the floating diffusion than the second sub-region.