Photodiode-Surround Pixel Layout for High Dynamic Range Sensors
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Solution Overview
Problem
Increasing the dynamic range of image sensors to improve performance in low light environments while minimizing image lag, which occurs due to increased pinning voltage from larger photodiodes, requires a more efficient pixel layout that reduces pinning voltage without compromising full well capacity.
Innovation Solution
The pixel layout incorporates photodiode regions that partially surround circuitry, with a unique cross-sectional shape such as 'U', 'C', or 'O' shapes, allowing for efficient space utilization and reduced photodiode width, thereby decreasing pinning voltage while maintaining full well capacity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If photodiode size is increased to improve dynamic range, then full well capacity is improved, but pinning voltage increases causing image lag
Solution Approach 1:
The pixel layout is segmented into distinct regions: a first region containing circuitry and a second region containing the photodiode. This spatial segmentation allows the photodiode to be positioned adjacent to rather than overlapping with circuitry, enabling larger photodiode area for improved full well capacity while maintaining lower pinning voltage by reducing overlap with charged circuitry regions, thereby reducing image lag
Solution Approach 2:
The patent transitions from a two-dimensional planar overlap arrangement to a more sophisticated spatial arrangement where the photodiode is positioned in an adjacent region. This dimensional reorganization allows both the photodiode and circuitry to coexist without harmful overlap, enabling larger photodiode area for higher full well capacity while maintaining lower pinning voltage and reducing image lag
2Adaptability or versatility
If photodiode size is increased to improve dynamic range, then dynamic range is improved, but pixel density decreases
Solution Approach 1:
By segmenting the pixel into separate circuitry and photodiode regions positioned adjacent to each other, the layout optimizes space utilization. This allows each component to be sized appropriately for its function without wasting space, enabling larger photodiodes for improved dynamic range while maintaining high pixel density through efficient spatial arrangement
Solution Approach 2:
The patent employs a spatial arrangement that effectively utilizes three-dimensional space and adjacent region positioning to resolve the trade-off between photodiode size and pixel density. This dimensional approach allows larger photodiodes for improved dynamic range while maintaining high pixel density through optimized spatial packing
3Object-generated harmful factors
If photodiode width is reduced to decrease pinning voltage, then image lag is reduced, but full well capacity decreases
Solution Approach 1:
The segmentation of circuitry and photodiode into adjacent regions allows the photodiode to achieve a larger effective area for higher full well capacity without increasing width in a way that would increase pinning voltage. The spatial separation enables area expansion through extended perimeter rather than increased width, maintaining low pinning voltage and reducing image lag
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables high dynamic range image sensors with reduced image lag and increased pixel density per unit area, enhancing performance in low light conditions without significant trade-offs in full well capacity.
Implementation Method 1
The image sensor includes an array of pixels having photosensitive elements (e.g., photodiodes) that absorb a portion of the incident image light and generate image charge upon absorption of the image light
Data Source
AI summary
An image sensor comprises a first photodiode region and circuitry. The first photodiode region is disposed within a semiconductor substrate proximate to a first side of the semiconductor substrate to form a first pixel. The first photodiode region includes a first segment coupled to a second segment. The circuitry includes at least a first electrode associated with a first transistor. The first electrode is disposed, at least in part, between the first segment and the second segment of the first photodiode region such that the circuity is at least partially surrounded by the first photodiode region when viewed from the first side of the semiconductor substrate.