Photoimageable Dielectric Adhesive for Semiconductor Packages
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Solution Overview
Problem
Conventional methods for attaching semiconductor dice to substrates often result in entrapped dielectric underfill material, leading to increased electrical resistance, joint integrity issues, and early device failure, particularly with thin substrates where underfill material contamination is more likely.
Innovation Solution
A method involving a photoimageable dielectric adhesive material applied to semiconductor dice and substrates, selectively removed using photolithography to ensure each electrical interconnection is free of entrapped material and the gap between the die and substrate is fully filled, preventing voids and contamination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If WLU method is used to apply underfill material to the entire semiconductor wafer, then manufacturing time and cost are reduced, but entrapped underfill material increases electrical resistance and causes joint integrity issues
Solution Approach 1:
The patent segments the underfill application process by applying material to the entire wafer in one step (improving productivity) then using photolithography to selectively remove material from specific areas (conductive element regions) to prevent entrapment (maintaining reliability). This two-stage approach combines the benefits of bulk application with precise local control.
Solution Approach 2:
The patent performs preliminary photolithography processing to pattern and remove underfill material from conductive element regions before the bonding step. This preliminary action ensures that no underfill material will be trapped during subsequent bonding, preventing electrical resistance issues while maintaining the productivity benefits of wafer-level application.
2Reliability
If CUF method is used to introduce underfill material into gaps between individual semiconductor dice and substrates, then entrapped underfill material is eliminated, but manufacturing time and cost increase
Solution Approach 1:
The patent merges the advantages of both WLU and CUF methods by combining wafer-level bulk application (for efficiency) with capillary-driven gap filling (for reliability). The photolithography step creates open channels that allow underfill material to flow into gaps via capillary action during bonding, achieving complete gap filling without entrapment while maintaining productivity.
Solution Approach 2:
The patent introduces photolithography as an intermediary process between material application and bonding. This intermediary step patterns the underfill material to create controlled channels that guide material flow into gaps during bonding, mediating between the conflicting requirements of high-speed application and defect-free filling.
3Reliability
If photoimageable dielectric adhesive material is applied to entire wafer and selectively removed, then entrapped material is eliminated, but process complexity increases
Solution Approach 1:
The patent uses photoimageable dielectric adhesive material that serves multiple functions: it acts as the underfill material, provides photolithographic patterning capability, and functions as an adhesive. This multi-functionality consolidates what would otherwise be separate processes into one integrated material system, reducing overall process complexity despite the added photolithography step.
Solution Approach 2:
The patent exploits changes in the material's properties through photolithographic exposure and development. The material transitions from a uniform applied layer to a patterned structure with controlled presence/absence in different regions. This parameter change (from continuous to patterned) enables selective retention/removal without requiring separate application and removal processes for different areas.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability and performance of semiconductor device packages by eliminating entrapped underfill material, reducing voids, and minimizing backside contamination, while maintaining a low manufacturing cost and mechanical stress on fine pitch conductive structures.
Implementation Method 1
selectively removed, such as by a photolithography operation
Implementation Method 2
bonded to the substrate through a thermal compression process
Implementation Method 3
the solder on the tips of the conductive elements 12 may melt to wet the bond pads 42
Implementation Method 4
The WLU material 30 melts and flows to fill the gap between the semiconductor die 11 and the substrate 40
Implementation Method 5
The WLU material 30 melts and flows to fill the gap
Implementation Method 6
a relatively low-viscosity, liquid dielectric CUF material 32 is introduced into a gap between the semiconductor die 11 and the substrate 40 along one or more edges of the gap and is allowed to fill in the gap by wetting of surfaces and capillary action
Implementation Method 7
a relatively low-viscosity, liquid dielectric CUF material 32 is introduced into a gap between the semiconductor die 11 and the substrate 40 along one or more edges of the gap and is allowed to fill in the gap by wetting of surfaces and capillary action
Data Source
AI summary
Methods for forming semiconductor device packages include applying a photoimageable dielectric adhesive material to a major surface of a semiconductor die and at least partially over conductive elements on the semiconductor die. The photoimageable dielectric adhesive material may be removed from over the conductive elements. The conductive elements are aligned with and bonded to bond pads of a substrate, and the semiconductor die and the substrate are adhered with the photoimageable dielectric adhesive material. A semiconductor device package includes at least one semiconductor die including conductive structures thereon, a substrate including bond pads thereon that are physically and electrically connected to the conductive structures, and a developed photoimageable dielectric adhesive material disposed between the semiconductor die and the substrate around and between adjacent conductive structures.