Photolithography Process Scheduling Under Hardware Constraints
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Solution Overview
Problem
Existing photolithographic processes face challenges in efficiently managing resource allocation and execution sequences for complex design and verification tasks, leading to suboptimal computational demands and inefficiencies.
Innovation Solution
A method is introduced to control the execution sequence of photolithographic processes by building a source tree with dependency relationships, defining multiple process conditions, expanding the tree to generate separate nodes, determining hardware requirements, and selecting computer hardware constraints to optimize the sequence for efficient processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the source tree is expanded to include all process conditions as separate nodes, then the execution sequence can be optimized for hardware constraints, but the tree complexity and memory requirements increase significantly
Solution Approach 1:
The patent segments the expanded tree into multiple execution sequences that can be processed in batches. Each sequence represents a manageable subset of nodes that can be executed independently, reducing the memory footprint while maintaining optimization benefits. The segmentation allows the system to handle large process condition spaces without overwhelming computational resources.
Solution Approach 2:
The patent performs preliminary expansion of the source tree to identify all process conditions and their dependencies before execution. This preliminary action allows the system to determine the optimal execution sequence in advance, considering hardware constraints, so that during actual execution, the system follows a pre-planned efficient path without needing to manage complex real-time decisions.
2Manufacturing precision
If all process conditions are expanded into separate nodes with full dependency relationships, then the optimization for hardware constraints becomes more accurate, but the memory consumption increases
Solution Approach 1:
The patent divides the full expanded tree into multiple execution sequences, each containing a subset of nodes. This segmentation reduces the amount of data that needs to be held in memory at any one time, while still maintaining the accuracy of hardware constraint optimization within each sequence. The system can process large process condition spaces by handling them in manageable chunks.
Solution Approach 2:
The patent implements dynamic memory management where the system loads only the necessary portions of the expanded tree into memory based on the current execution sequence. As execution progresses through different sequences, different subsets of nodes are loaded and unloaded from memory, optimizing memory utilization while maintaining the ability to access all process conditions when needed.
3Use of energy by moving object
If the execution sequence is determined based on detailed hardware requirements and constraints, then computational resource utilization is optimized, but the computation time for determining the sequence increases
Solution Approach 1:
The patent performs the computationally intensive task of determining the optimal execution sequence as a preliminary step before actual process execution. By analyzing hardware requirements and constraints in advance and establishing the optimal sequence beforehand, the system avoids repeated complex calculations during execution. This preliminary optimization balances the trade-off by accepting upfront computation time in exchange for efficient resource utilization during the actual process.
Solution Approach 2:
The patent segments the computation of execution sequences into multiple independent sequences that can be determined and executed separately. This segmentation reduces the overall computation time by breaking down the large optimization problem into smaller, more manageable sub-problems, each of which can be solved more quickly while still achieving overall resource optimization.
Data Source
AI summary
A method of controlling a computer process for designing or verifying a photolithographic component, the method including building a source tree including nodes of the process, including dependency relationships among the nodes, defining, for some nodes, at least two different process conditions, expanding the source tree to form an expanded tree, including generating a separate node for each different defined process condition, and duplicating dependent nodes having an input relationship to each generated separate node, determining respective computing hardware requirements for processing the node, selecting computer hardware constraints based on capabilities of the host computing system, determining, based on the requirements and constraints and on dependency relations in the expanded tree, an execution sequence for the computer process, and performing the computer process on the computing system.


