Photolithography Process Window Expansion via Layout and Light Source Optimization
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Solution Overview
Problem
The existing photolithography processes have a relatively small process window due to the interplay of substrate and light source vibrations, leading to distortion in pattern dimensions, which makes it challenging to meet the stringent requirements for smaller semiconductor feature sizes.
Innovation Solution
A photolithography process that involves providing a test layout with multiple test patterns, performing optical proximity correction and phase-shifting masking, identifying weak regions, and iteratively optimizing the layout and light source to increase the distance between adjacent patterns and optimize the light source, thereby expanding the process window.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the design dimension is reduced to meet smaller semiconductor features, then the manufacturing precision improves, but the optical proximity effect worsens due to diffraction and interference
Solution Approach 1:
The patent applies optical proximity correction (OPC) to the mask layout before photolithography exposure. This preliminary modification of the mask pattern compensates for anticipated diffraction and interference effects, allowing smaller feature sizes to be manufactured while maintaining pattern fidelity and reducing optical proximity effects.
2Ease of operation
If substrate or light source vibration occurs during photolithography, then the ease of operation is maintained, but the manufacturing precision deteriorates due to pattern dimension deviation
Solution Approach 1:
The patent determines a process window that defines acceptable ranges for substrate and light source vibrations. By establishing parameter thresholds for vibration amplitudes and exposure conditions, the system maintains ease of operation while ensuring pattern dimensions remain within specification limits despite environmental disturbances.
3Device complexity
If conventional photolithography is used for smaller features, then the device complexity is reduced, but the manufacturing precision deteriorates due to insufficient process window
Solution Approach 1:
The patent segments the photolithography process into distinct optimization stages: mask layout design with OPC, process window determination through simulation, and exposure parameter optimization. This segmentation allows each stage to be independently optimized, improving manufacturing precision while managing overall process complexity through systematic decomposition.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces distortion and increases the photolithography process window by optimizing the layout and light source, allowing for more precise pattern formation and meeting the design requirements for smaller semiconductor features.
Implementation Method 1
Photolithography is a very important technology in semiconductor manufacturing that can transfer a graphic pattern from a mask plate to the surface of a silicon wafer
Implementation Method 2
the diffraction effect and the interference effect of light become more and more prominent, which may cause serious distortion of the actually-formed photolithography pattern
Implementation Method 3
the diffraction effect and the interference effect of light become more and more prominent, which may cause serious distortion of the actually-formed photolithography pattern
Data Source
AI summary
A photolithography process includes providing a first test layout including test patterns, and a first light source; forming an initial mask layout according to the first test layout; forming a mask layout including mask layout patterns through an optical proximity correction or a phase-shifting masking; forming exposed patterns by exposing the mask layout using the first light source; and determining a weak region from the first test layout. A first distance between adjacent test patterns in the weak region is unequal to a second distance between corresponding exposed patterns. The photolithography process further includes performing a re-layout on the weak region to increase the first distance, thereby providing an adjusted test layout; performing a light-source optimization to obtain an adjusted light source; and determining the adjusted test layout and the adjusted light source as a second test layout and a second light source, respectively when process window requirements are satisfied.