Photomask Layout Pattern With Boolean SRAF Generation
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Solution Overview
Problem
Current semiconductor manufacturing processes face pattern deviation issues due to the optical proximity effect, particularly with the increased integration density of integrated circuits, which affects performance and yield, and the method of adding sub-resolution assist features (SRAF) is time-consuming and may conflict with design rules.
Innovation Solution
A method is introduced that generates offset patterns using Boolean operations to create assist features, which are then combined with the target pattern to form a photomask, reducing processing time while improving pattern fidelity and contrast in the lithography process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If sub-resolution assist features (SRAF) are added to layout patterns to improve pattern fidelity and resolution, then the lithography process can transfer patterns more faithfully, but the processing time is significantly increased and it may conflict with design rules
Solution Approach 1:
The patent performs optical proximity correction in advance during the layout design phase, generating corrected layout patterns with assist features before photomask fabrication. This preliminary correction eliminates the need for time-consuming post-processing and iterative adjustments, thereby reducing overall processing time while maintaining high pattern fidelity
Solution Approach 2:
The patent uses computer-based optical proximity correction algorithms to generate virtual models and simulate lithography results before actual photomask fabrication. This digital copying and simulation approach allows for rapid iteration and optimization without physical prototyping, significantly reducing processing time while ensuring pattern accuracy
2Measurement precision
If sub-resolution assist features (SRAF) are added to improve pattern resolution, then the contrast and resolution of lithography are enhanced, but the method consumes long processing time and may conflict with design rules
Solution Approach 1:
The patent performs optical proximity correction in advance during the layout design phase, generating corrected layout patterns with assist features before photomask fabrication. This preliminary correction eliminates the need for time-consuming post-processing and iterative adjustments, thereby reducing overall processing time while maintaining high pattern fidelity
Solution Approach 2:
The patent uses computer-based optical proximity correction algorithms to generate virtual models and simulate lithography results before actual photomask fabrication. This digital copying and simulation approach allows for rapid iteration and optimization without physical prototyping, significantly reducing processing time while ensuring pattern accuracy
Data Source
AI summary
A method of forming a photomask includes: providing a target pattern; generating a first offset pattern according to the target pattern and a first offset value; generating a second offset pattern according to the first offset pattern and a second offset value; operating the first offset pattern and the second offset pattern with a Boolean operation to obtain a first assist feature; and outputting the target pattern and the first assist feature to form the photomask. The manufacturing time of the resulting photomask can be shortened and fidelity of patterns produced by the photomask can be improved so as to facilitate transfer of the target pattern to the semiconductor substrate precisely.