Photomask Dry Etch Parameter Tuning for CD Uniformity

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Solution Overview

Problem

Current photolithography techniques face challenges in achieving precise pattern transfer onto semiconductor substrates due to limitations in exposure wavelength and etch process control, particularly in extreme ultraviolet (EUV) lithography, which affects the resolution and uniformity of integrated circuit features.

Innovation Solution

The implementation of a lithography system that includes a reflective or transmissive reticle with specific layer structures and a dry etching process optimized using a plasma global model and surface etch model to determine and adjust dry etch control parameters, ensuring precise etching of light-shielding layers and pattern formation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If exposure wavelength is reduced to improve photolithography resolution, then manufacturing precision is improved, but device complexity increases due to EUV lithography system requirements

Engineering Contradiction:
Improvephotolithography resolutionVSAvoidlithography system complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent changes the exposure wavelength parameter from conventional UV to extreme ultraviolet (EUV) range, enabling higher resolution pattern transfer. This parameter change resolves the contradiction by achieving improved manufacturing precision through shorter wavelength while accepting the necessary system complexity as a trade-off for advanced node fabrication

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If dry etch control parameters are not optimized, then device complexity is reduced, but manufacturing precision deteriorates due to poor CD uniformity and increased defects

Engineering Contradiction:
Improvecritical dimension uniformityVSAvoidetch process control complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent implements feedback control by measuring etch performance parameters (CD uniformity, damage, defects) and adjusting dry etch control parameters accordingly. This feedback mechanism achieves improved manufacturing precision through iterative optimization of etch processes, resolving the contradiction between precision and control complexity

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent performs preliminary determination of dry etch control parameters based on plasma global model and surface etch model before actual etching. This preliminary action resolves the contradiction by pre-optimizing etch parameters to achieve better CD uniformity and reduced defects, minimizing the need for complex real-time adjustments

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the resolution and uniformity of pattern transfer, improving critical dimension (CD) uniformity, reducing damage, and minimizing defects, thereby facilitating the fabrication of advanced semiconductor devices.

Implementation Method 1

using a dry etcher set up with the dry etch control parameters, etching the target layer through the patterned photoresist layer

Methodology Applied
Scientific EffectPlasma: Plasma

Implementation Method 2

depositing a target layer over a dielectric substrate

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Data Source

PatentUS20230402283A1Method for fabricating mask
Publication Date: 2023.12.14 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20230402283A1 patent drawing
  • US20230402283A1 patent drawing
  • US20230402283A1 patent drawing

AI summary

A method for fabricating a mask is provided. The method includes depositing a target layer over a dielectric substrate; forming a patterned photoresist layer over the target layer according to an integrated circuit (IC) layout; determining a plurality of dry etch control parameters according a material of the target layer and an information of the IC layout; and using a dry etcher set up with the dry etch control parameters, etching the target layer through the patterned photoresist layer.