Photomask Layout Verification Using Segmented Buffer Regions

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Solution Overview

Problem

The high volume of graphic data in advanced IC processes makes correction and verification steps in photolithography time-consuming, especially when feature sizes approach half the wavelength of the light source, requiring multiple correction and verification steps to maintain accuracy in pattern transfer.

Innovation Solution

A method for making a photomask layout that involves a first correction and verification step followed by a second correction and verification step, focusing only on buffer regions around modified patterns, using different EDA tools and optical models to reduce CPU run time, with the second verification step covering less than the whole photomask area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If correction and verification steps are performed to the whole graphic data of the photomask, then the accuracy in pattern transferring is improved, but the CPU run time increases significantly

Engineering Contradiction:
Improvepattern transferring accuracyVSAvoidCPU run time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent divides the verification process into two stages: first verifying the entire graphic data after initial correction, then performing a second verification only on buffer regions surrounding modified patterns. This segmentation allows comprehensive verification while reducing redundant checks on unchanged areas, thereby decreasing CPU run time while maintaining pattern transferring accuracy

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different verification scopes to different regions of the photomask data. Buffer regions around modified patterns receive focused verification attention, while unchanged regions are excluded from the second verification step. This local quality approach ensures critical areas are thoroughly checked without wasting computational resources on stable regions

Inventive Principle:
Principle #3Local quality

2Manufacturing precision

If multiple correction and verification steps are performed, then the critical dimension deviation is reduced, but the processing time becomes very long

Engineering Contradiction:
Improvecritical dimension accuracyVSAvoidprocessing speed
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent performs a first correction step and first verification step on the entire graphic data before the second correction and verification steps. This preliminary action identifies all patterns requiring modification upfront, allowing the subsequent buffer region verification to focus only on necessary areas, thus maintaining critical dimension accuracy while improving processing speed

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Instead of performing exhaustive verification on the entire photomask data in multiple steps, the patent applies verification selectively to buffer regions around modified patterns in the second verification step. This partial action approach provides sufficient verification for critical areas without the excessive processing time of complete multi-step verification

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS8745547B1Method for making photomask layout
Publication Date: 2014.06.03 UNITED MICROELECTRONICS CORP
  • US8745547B1 patent drawing
  • US8745547B1 patent drawing
  • US8745547B1 patent drawing

AI summary

A method for making a photomask layout is disclosed. A graphic data of a photomask is provided. A first correction step is performed to the graphic data. A first verification step is performed to all of the graphic data which has been subjected to the first correction step, wherein at least one failed pattern not passing the first verification step is found. A second correction step is performed to the at least one failed pattern, so as to obtain at least one modified pattern. A second verification step is performed only to at least one buffer region covering the at least one modified pattern, wherein the buffer region has an area less than a whole area of the photomask. Besides, each of the first correction step, the first verification step, the second correction step and the second verification step is executed by a computer.