Single Photon Counting Detector Counter Architecture

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Solution Overview

Problem

Current single photon counting detector systems face limitations in high photon rate applications, particularly in protein crystallography and pump and probe measurements, due to signal pile-up and the inability to simultaneously measure different states at high repetition rates, leading to reduced count rate capability and limited statistical collection.

Innovation Solution

The system employs an NxM array of photo-detector diodes with high-gain, low-noise readout unit cells connected to multiple gateable digital counters, allowing for independent control of counting intervals and thresholds, enabling simultaneous measurement of different states and mitigating signal pile-up through dual threshold settings and time-over-threshold mode.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single digital counter per pixel is used, then the device complexity is reduced, but the count rate capability is limited due to signal pile-up at high photon rates

Engineering Contradiction:
Improvecounter architectureVSAvoidcount rate capability
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The single counter per pixel is segmented into multiple independent digital counters (first counter and second counter), each capable of independently counting photons within their respective gateable time intervals. This segmentation allows simultaneous counting in multiple time windows, effectively increasing the count rate capability without proportionally increasing complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces gateable time intervals that can be dynamically adjusted and independently controlled for each counter. The gateable section allows the counting windows to be opened and closed at different times, enabling flexible measurement of different states (pumped and unpumped) and adaptation to varying photon rates, thus dynamically optimizing the count rate capability.

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If multiple counters per pixel are implemented, then simultaneous measurement of different states is enabled, but the device complexity increases

Engineering Contradiction:
Improvesimultaneous measurement capabilityVSAvoidcounter architecture
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

Each digital counter is designed with universal functionality, including a gateable section that can be independently controlled. The same counter structure (comparator, digital counter, gateable section) serves multiple purposes: counting photons in different time windows, measuring different states, and adapting to various measurement modes. This multi-functionality reduces the need for entirely separate counter structures for different measurement tasks.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The gateable sections are pre-configured with independently controllable gate signals that define counting intervals. This preliminary setup of gateable time intervals allows the system to rapidly switch between different measurement modes without requiring complex real-time reconfiguration, thereby reducing the operational complexity despite having multiple counters.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If gateable time intervals are independently controlled, then pump and probe measurements at high repetition rates are enabled, but the control complexity increases

Engineering Contradiction:
Improvemeasurement speedVSAvoidcontrol system
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The gateable time intervals are controlled using periodic gate signals that synchronize with the pump-probe measurement cycle. The first and second counters receive gate signals that open their counting windows at specific periodic intervals corresponding to the pumped and unpumped states. This periodic control simplifies the timing coordination compared to arbitrary independent control, enabling high repetition rate measurements while maintaining manageable control complexity.

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design significantly enhances the count rate capability, allowing for high sampling rates and simultaneous measurement of multiple states, effectively overcoming signal pile-up and enabling efficient data collection in high photon rate environments.

Implementation Method 1

a layer of photosensitive material; an NxM array of photo-detector diodes arranged in said layer of photosensitive material

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Data Source

PatentEP2676434B1Single photon counting detector system having improved counter architecture
Publication Date: 2018.07.18 PAUL SCHERRER INSTITUT
  • EP2676434B1 patent drawingFigure 1~2
  • EP2676434B1 patent drawingFigure 3
  • EP2676434B1 patent drawingFigure 4

AI summary

The present invention relates to a single photon counting detector system (14), comprising: a) a layer of photosensitive material (4); b) an NxM array of photo-detector diodes (2) arranged in said layer of photosensitive material (4); each of said photo-detector diodes (2) having a bias potential interface (12) and a diode output interface, said bias potential interface (12) of each photo-detector diode (2) being connected to a bias potential (Vbias ); c) an NxM array of high gain, low noise readout unit cells (RO), one readout unit cell (RO) for each photo- detector diode (2); d) each readout unit cell (RO) comprising: d1) an input interface (IN) connected to said diode output interface, a high-gain voltage amplifying means (amp) comprising an integration capacitor (Cint ), d2) at least two parallel lines of digital counters, d3) each line comprising a comparator having an individually selectable threshold (threshold1, threshold 2) and a gateable section (gate1, gate2) to determine the counting intervals of the digital counters. e) a multiplexing means allowing to access the readout cell unit either on a per pixel basis or for several pixels in parallel to read out the digital counter to a data processing means transfering the data off the chip to the data processing means, in particular external readout electronics which do not form an integral part of the readout unit cells.