Photon Counting Pixel Circuit Architecture Using Analogue Voltage Integration
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Solution Overview
Problem
Current pixel architectures for detecting and counting photons suffer from low fill factor, non-uniformity, and non-linearity in signal counting, particularly in analogue implementations, which affect the reliability and quality of photon counting in applications like FLIM, leading to increased complexity and reduced performance.
Innovation Solution
A compact circuit architecture for pixels using nMOS transistors and a specific electronic interruption mechanism that stabilizes voltage and filters signals, enabling efficient photon counting with shorter observation time windows and reducing non-linearity, while maintaining uniformity across the sensor matrix.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If TCSPC technique is implemented with digital circuitry, then measurement precision is improved, but device complexity increases and fill factor decreases to below 1%
Solution Approach 1:
The patent extracts the timing measurement function from complex digital circuitry and implements it through a simplified analogue voltage integration approach. The TAC circuit is replaced by integrating photodiode currents directly into voltage signals that represent photon arrival times, removing the need for complex digital timing circuits while maintaining measurement capability.
Solution Approach 2:
The patent replaces the digital/electronic TAC (Time-to-Amplitude Converter) system with an analogue electrical integration system. Instead of using complex electronic timing circuits to measure photon arrival times, the system integrates photocurrents into voltage signals that directly encode timing information, substituting mechanical/electronic timing mechanisms with analogue electrical processes.
2Measurement precision
If TCSPC technique is implemented, then measurement precision is improved, but area of pixel decreases to below 1% fill factor
Solution Approach 1:
The patent removes the timing measurement functionality from the physical pixel structure by performing temporal integration in the analogue domain. Photon arrival time information is extracted and encoded into voltage amplitudes through current integration, allowing the pixel to maintain full sensitive area while preserving timing measurement capability through the integrated voltage signal.
Solution Approach 2:
The patent transforms the timing measurement from a temporal dimension problem into an amplitude dimension problem. Instead of measuring time directly through complex circuits, the system integrates currents over time to produce voltage amplitudes that encode timing information, effectively moving the measurement from the time domain to the voltage amplitude domain.
3Area of stationary object
If analogue time-gating technique is used, then fill factor increases to around 20%, but manufacturing precision decreases due to non-uniformity and non-linearity
Solution Approach 1:
The patent changes the operating parameters of the photodiode by applying reverse bias voltage to operate in Geiger mode, where the photodiode exhibits binary response (no photon or photon detected). This parameter change transforms the analogue current integration into a digital-like counting process, improving uniformity across pixels while maintaining the simplified analogue architecture and high fill factor.
Solution Approach 2:
The patent enables the photodiode to self-correct for manufacturing variations by operating in Geiger mode with reverse bias. The breakdown voltage characteristic of the reverse-biased photodiode automatically compensates for pixel-to-pixel variations, providing self-calibration and improving counting uniformity without requiring additional precision manufacturing or complex correction circuits.
4Productivity
If observation time window is shortened, then productivity is improved, but measurement precision deteriorates due to reduced integration time
Solution Approach 1:
The patent implements dynamic observation time windows that can be adjusted based on the application requirements. The integration period for photon currents can be varied to optimize between counting rate and detection precision, allowing the system to adapt its time integration characteristics dynamically rather than being fixed, thus resolving the trade-off between productivity and precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances the fill factor, reliability, and uniformity of photon counting, producing sensors with improved output signals and reduced non-linearity, capable of handling shorter observation times and multiple functions within the pixel architecture.
Implementation Method 1
Each one of said pixels in turn comprises a sensitive element that in principle consists of a photodiode capable of generating an electric signal in the point where a photon is incident on its sensitive surface
Implementation Method 2
In the case where single photons are detected, as in the case of said FLIM, the use of a special type of photodiode called SPAD (Single Photon Avalanche Diode) is known
Data Source
Figure 1~2
Figure 3
Figure 4a
AI summary
The invention is a pixel (1) for detecting photons, of the type comprising: a photodiode (2) having a first contact terminal (21) connected to the first contact terminal (31) of first electronic interruption means (3) and the second contact terminal (22) connected to a first input pin (11) of the pixel (1); the first electronic interruption means (3) having the switch over control terminal (33) connected to a second input pin (12) and the second contact terminal (32) connected to a third input pin (13); second electronic interruption means (4) having the first contact terminal (41) connected to a first charge accumulation element (101), the second contact terminal (42) connected to the first contact terminal (21) and the switch over control terminal (43) connected to a fourth input pin (14); third electronic interruption means (5) having the first contact terminal (51) connected to a fifth input pin (15) and the switch over control terminal (53) connected to the first charge accumulation element (101); fourth electronic interruption means (6) having the first contact terminal (61) connected to a third charge accumulation element (103) and to an output pin (10), the second contact terminal (62) connected to the first contact terminal (71) of fifth electronic interruption means (7) and to a second charge accumulation element (102) and the switch over control terminal (63) connected to the second contact terminal (52) of the third electronic interruption means (5); the fifth electronic interruption means (7) having the second contact terminal (72) connected to a sixth input pin (16) and the switch over control terminal (73) connected to a seventh input pin (17).