Photonic Bit-Corrector Circuits for Cascaded Gate Error Correction

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Solution Overview

Problem

Cascaded photonic gates in photonic circuits suffer from accumulative errors that are costly to correct using thresholder circuits, which are computationally and area-wise expensive.

Innovation Solution

Integrate photonic bit-corrector circuits with photonic and electronic components to generate and compare photonic output signals, using a photodetector array and electronic circuit to correct errors based on label signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If thresholder circuits are used to correct accumulative errors in cascaded photonic gates, then error correction is achieved, but computational cost and area consumption increase significantly

Engineering Contradiction:
Improveerror correctionVSAvoidcomputational cost and area
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The error correction function is segmented into multiple photonic bit-corrector circuits, each handling specific error correction tasks for different photonic gates. This segmentation allows distributed error correction across the photonic circuit, reducing the computational burden and area requirement compared to a single centralized thresholder circuit.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses photonic bit-corrector circuits that generate corrected photonic output signals by comparing with label signals. This copying approach creates parallel correction paths that reduce the need for complex thresholding operations, thereby lowering computational cost and area consumption while maintaining error correction reliability.

Inventive Principle:
Principle #26Copying

2Productivity

If photonic bit-corrector circuits are integrated with photonic and electronic components, then error correction efficiency is improved, but device complexity increases

Engineering Contradiction:
Improveerror correction efficiencyVSAvoidintegration of multiple components
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges photonic bit-corrector circuits with photonic and electronic components into an integrated circuit. This merging allows the error correction function to be implemented using a combination of photonic processing and electronic detection, improving error correction efficiency while managing device complexity through functional integration.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The photodetector array acts as an intermediary between the photonic bit-corrector circuit and the electronic circuit. It converts photonic signals to electrical signals, enabling the electronic circuit to compare and correct errors. This intermediary component simplifies the integration by providing a clear interface between photonic and electronic domains.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Efficiently corrects errors in photonic circuits with cascaded gates, reducing computational and area costs while maintaining high-bandwidth processing capabilities.

Implementation Method 1

The photodetector array generates an electrical signal based on the second photonic output signal

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Data Source

PatentUS12571843B2Bit-corrector circuits for photonic circuits with cascaded photonic gates
Publication Date: 2026.03.10 MILKSHAKE TECH INC
  • US12571843B2 patent drawing
  • US12571843B2 patent drawing
  • US12571843B2 patent drawing

AI summary

Embodiments of the present disclosure are directed to an integrated circuit with photonic bit-corrector circuits. The integrated circuit includes a photonic circuit, a photonic bit-corrector circuit, a photodetector array coupled to the photonic bit-corrector circuit, and an electronic circuit coupled to the photodetector array. The photonic circuit includes a plurality of cascaded photonic gates configured to generate a first photonic output signal for a set of photonic input signals applied to the photonic circuit. The photonic bit-corrector circuit is configured to generate a second photonic output signal for the set of photonic input signals applied to the photonic bit-corrector circuit. The photodetector array is configured to generate an electrical signal based on the second photonic output signal. The electronic circuit is configured to compare the electrical signal with a label signal and output a corrected version of the first photonic output signal based on the comparison.