Hybrid Photonic Chip Singulation via Partial Trenches

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Solution Overview

Problem

Existing techniques for singulating hybrid integrated photonic chips are hindered by the presence of photonic integrated circuits that hang over the edge of the substrate, making it impossible to use standard dicing or laser ablation methods without damaging these circuits.

Innovation Solution

A method involving the definition of trenches on a substrate, coupling photonic integrated circuits to the substrate where they overlap these trenches, and using a carrier and support mechanism to singulate the chips without cutting through the photonic circuits, allowing for the reduction of substrate thickness and removal of the support mechanism to isolate individual hybrid integrated photonic chips.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If standard dicing or laser ablation methods are used to singulate hybrid integrated photonic chips, then singulation can be performed efficiently, but the photonic integrated circuits that hang over the substrate edge are damaged

Engineering Contradiction:
Improvesingulation efficiencyVSAvoidphotonic integrated circuit integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The substrate is segmented into individual chip regions by defining trenches that extend partially through the substrate thickness. These trenches create physical boundaries between adjacent photonic integrated circuits, allowing singulation to proceed without cutting through the hanging circuit structures. The segmentation is achieved through controlled etching or dicing that stops before penetrating the full substrate depth, preserving the overhanging photonic components while still enabling chip separation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The solution transitions from a two-dimensional cutting approach (standard dicing through the substrate plane) to a three-dimensional approach by controlling the depth dimension of the trenches. By limiting trench depth to partial penetration rather than through-cut, the method creates a depth-based differentiation that protects the photonic integrated circuits hanging over the substrate edge while maintaining singulation capability in the lateral dimensions.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If photonic integrated circuits are extended to hang over the substrate edge for optical access, then optical I/O capability is enabled, but standard singulation processes become impossible

Engineering Contradiction:
Improveoptical I/O capabilityVSAvoidsingulation process feasibility
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The trenches are defined and prepared in advance before the final singulation step. This preliminary action creates predetermined separation paths that guide the subsequent singulation process, ensuring that when chips need to be separated, the process follows pre-established safe trajectories that avoid the photonic integrated circuits. The preliminary trench definition enables standard singulation equipment to be used without modification.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The trenches act as intermediary structures between the photonic integrated circuits and the singulation process. These partial-depth trenches serve as protective mediators that intercept the singulation cutting path, preventing direct contact between the cutting tool and the photonic circuits. The trenches absorb the cutting action while preserving the integrity of the hanging photonic components.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the efficient singulation of hybrid integrated photonic chips without damaging the photonic integrated circuits, facilitating the use of chip-on-wafer fabrication techniques, increasing yield, and reducing costs.

Implementation Method 1

deep anisotropic etching (such as deep reactive ion etching for a silicon substrate)

Methodology Applied
Scientific EffectDeep anisotropic etching:

Implementation Method 2

laser cutting

Methodology Applied
Scientific EffectLaser cutting: Laser Ablation

Implementation Method 3

the thickness of the substrate may be reduced using grinding

Methodology Applied
Scientific EffectGrinding: Abrasion

Data Source

PatentUS9159861B2Method for singulating hybrid integrated photonic chips
Publication Date: 2015.10.13 ORACLE INT CORP
  • US9159861B2 patent drawing
  • US9159861B2 patent drawing
  • US9159861B2 patent drawing

AI summary

During a fabrication technique, trenches are defined partially through the thickness of a substrate. Then, photonic integrated circuits are coupled to the substrate. These photonic integrated circuits may be in a diving-board configuration, so that they at least partially overlap the trenches. While this may preclude the use of existing dicing techniques, individual hybrid integrated photonic chips (which each include a portion of the substrate and at least one of the photonic integrated circuits) may be singulated from the substrate by: coupling a carrier to a front surface of the substrate; thinning the substrate from a back surface until the partial trenches are reached (for example, by grinding the substrate); attaching a support mechanism (such as tape) to the back surface of the substrate; removing the carrier; and then removing the support mechanism.