Photonic Chip Oxide Thinning With Embedded Stop Pads
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Solution Overview
Problem
The existing methods for fabricating photonic chips using standard SOI substrates result in low accuracy of the thin dielectric layer thickness, affecting the coupling between optical components and the performance of the chip.
Innovation Solution
A manufacturing process that involves using pads distributed across the substrate to control the thickness of the thin dielectric layer by etching and polishing, ensuring high precision and compatibility with standard SOI substrates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the thin dielectric layer is obtained by thinning the buried layer of a standard SOI substrate, then the use of standard SOI substrates is enabled and the process is easily implemented, but the accuracy of the thin dielectric layer thickness is low
Solution Approach 1:
The method applies preliminary actions by performing selective etching of the buried oxide layer at specific locations (through holes and localized areas) before the final thinning process. This creates reference surfaces and controlled removal zones that guide subsequent polishing steps, ensuring both ease of manufacture and improved thickness accuracy of the final dielectric layer.
2Ease of manufacture
If the thin dielectric layer is obtained by thinning the buried layer of a standard SOI substrate, then the process is easily implemented, but an error in the thickness of this thin dielectric layer alters the coupling between optical components and therefore the performance of the fabricated photonic chip
Solution Approach 1:
The method implements feedback control through iterative thinning and measurement cycles. The buried oxide layer is selectively etched and then thinned uniformly until reference surfaces are exposed, at which point the process stops. This feedback mechanism ensures the final dielectric layer achieves the precise thickness required for optimal optical coupling, thereby improving reliability while maintaining ease of manufacture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The process achieves precise control over the thin dielectric layer thickness, improving the accuracy and performance of photonic chips while maintaining compatibility with standard SOI substrates, reducing errors and enhancing the flatness and bonding of the optical components.
Implementation Method 1
a) etching a cavity in the single-crystal silicon layer at the location of each pad, the cavity passing completely through the single-crystal silicon layer
Implementation Method 2
b) performing a chemical-mechanical polishing process on the back face of the substrate to thin the buried oxide layer until a predetermined thickness is reached
Data Source
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AI summary
This process includes: - before bonding a substrate to a layer of encapsulated semiconductor material in which a first part of an optical component is made, the making (91) of pads embedded inside a buried layer of silicon oxide, each of these pads having a buried face which extends parallel to an interface between the buried layer and the layer of encapsulated semiconductor material at a predetermined depth inside the buried layer, each of the buried faces being made of a material different from silicon oxide, then - the thinning (128) of the buried layer to leave a residual layer of silicon oxide on the layer of encapsulated semiconductor material, this thinning including an operation of thinning the buried layer with stopping this thinning as soon as the buried face of the pads is exposed.