Offset-Stacked Photonic Chip Package for Vertical Alignment
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Solution Overview
Problem
Existing semiconductor packages face challenges in reducing alignment errors, particularly in the vertical direction, which affects the efficient stacking and integration of photonic integrated circuit (PIC) chips.
Innovation Solution
The semiconductor package incorporates a design where PIC chips are offset-stacked, with each chip featuring a groove recessed from its top and side surfaces. An optical fiber unit with fibers extending into these grooves facilitates precise alignment, reducing vertical alignment errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If PIC chips are stacked in the vertical direction, then the integration and functionality of semiconductor packages are improved, but alignment errors in the vertical direction increase
Solution Approach 1:
The patent introduces an optical fiber unit as an intermediary component between stacked PIC chips. The optical fiber unit includes alignment marks that serve as reference points, enabling precise alignment during the stacking process. This mediator facilitates accurate positioning without requiring direct alignment between the PIC chips themselves, thereby reducing vertical alignment errors while maintaining high integration.
Solution Approach 2:
The patent implements preliminary alignment mark formation on the optical fiber unit before the stacking process. The alignment marks are pre-positioned on the optical fiber unit, which is then used as a reference during chip stacking. This preliminary preparation enables accurate alignment to be achieved during assembly, reducing vertical alignment errors while enabling effective stacking.
2Adaptability or versatility
If multiple PIC chips are stacked, then the functionality of semiconductor packages is enhanced, but the complexity of alignment and assembly increases
Solution Approach 1:
The optical fiber unit serves multiple functions: it provides optical fiber routing, establishes alignment references through its alignment marks, and acts as a mechanical support structure during stacking. This multi-functionality reduces the need for separate alignment fixtures or reference structures, thereby simplifying the overall assembly process while enabling multiple PIC chips to be stacked with enhanced functionality.
Data Source
AI summary
A semiconductor package includes a package substrate, an electronic integrated circuit chip mounted on the package substrate, a first photonic integrated circuit chip mounted on the electronic integrated circuit chip, the first photonic integrated circuit chip including a first groove recessed from a top surface and a side surface of the first photonic integrated circuit chip, and a second photonic integrated circuit chip mounted on the first photonic integrated circuit chip, the second photonic integrated circuit chip including a second groove recessed from a top surface and a side surface of the second photonic integrated circuit chip, wherein the second photonic integrated circuit chip is offset-stacked on the first photonic integrated circuit chip, wherein at least a portion of a bottom surface of the first groove of the first photonic integrated circuit chip is exposed to the outside.