Photonic Integrated Circuit Layout for Vertical Optical Computing
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Solution Overview
Problem
The computational intensity and power consumption of electronic integrated circuits (EICs) in deep neural networks (DNNs) for artificial intelligence/machine learning (AI/ML) applications exceed the limits of Moore's law, leading to unsustainable power consumption projections, necessitating a more efficient computing solution.
Innovation Solution
Implementing a photonic integrated circuit (PIC) for vertical optical computing (VOC) using vertical-cavity surface-emitting lasers (VCSELs) and diffractive optical elements to perform vector-matrix and matrix-matrix multiplications passively through homodyne detection, achieving computational parallelism and compactness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If electronic integrated circuits (EICs) are used to implement deep neural networks for AI/ML applications, then computational capability is achieved, but power consumption becomes unsustainable and exceeds Moore's law limits
Solution Approach 1:
The patent replaces electronic computing systems with photonic computing systems. Specifically, it uses photonic integrated circuits with Mach-Zehnder interferometers to perform vector-matrix multiplication operations optically instead of electronically, thereby achieving high computational capability while consuming minimal power since photonic systems do not suffer from the same power scaling limitations as electronic systems
Solution Approach 2:
The patent transitions from two-dimensional planar integration to three-dimensional vertical stacking of photonic components. By stacking multiple layers of waveguides, modulators, and detectors vertically, the system achieves high integration density and computational parallelism while maintaining compact form factor, enabling sustainable AI/ML computation
2Productivity
If photonic integrated circuit uses vertical stacking of components, then integration density and computational parallelism are enhanced, but device complexity increases
Solution Approach 1:
The patent implements vertical stacking where multiple functional layers are nested within each other in the vertical dimension. Each layer contains waveguides, modulators, and detectors that are integrated vertically, with lower layers supporting upper layers. This nesting approach achieves high integration density and computational parallelism while confining the complex structure to the vertical dimension, leaving the horizontal footprint compact
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The PIC for VOC achieves a 100× to 1000× enhancement in performance and energy efficiency by processing multiple inputs simultaneously, providing a compact and robust solution for AI/ML applications with high integration density and reduced power consumption.
Implementation Method 1
a first group of M vertical-cavity surface-emitting lasers (VCSELs) and a second group of N VCSELs
Implementation Method 2
a first diffractive optical element (DOE) disposed at a first plane... the first diffractive optical element (DOE) for producing a plurality of copies of the leader laser light beam
Implementation Method 3
a first group of M×N Mach-Zehnder interferometers (MZIs)... each MZI in the first group of M×N MZIs receives one of the plurality of copies of the leader laser light beam
Implementation Method 4
a second group of M diffractive optical elements (DOEs) disposed at a second plane... a plurality of detectors disposed at a fourth plane
Data Source
AI summary
A photonic integrated circuit including a first 4f system, a leader laser, a first diffractive optical element, a second 4f system, a plurality of first vertical-cavity surface-emitting lasers, a plurality of second vertical-cavity surface-emitting lasers, a plurality of second diffractive optical elements, a third diffractive optical element and a plurality of detectors is provided. The leader laser is disposed at the object plane of the first 4f system. The first diffractive optical element is disposed at the pupil plane of the first 4f system. The plurality of first vertical-cavity surface-emitting lasers and the plurality of second vertical-cavity surface-emitting lasers are disposed at the object plane of the second 4f system. The plurality of second diffractive optical elements and the third diffractive optical element are disposed at the pupil plane of the second 4f system. The plurality of detectors are disposed at the image plane of the second 4f system.


