Photonic Quasi-Monolithic Die Stacking for Sub-10 Micron Interconnects
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Solution Overview
Problem
Current packaging technologies for photonic integrated circuits (PICs) face challenges in achieving high-density interconnects for electrical and optical communication, leading to increased manufacturing complexity and cost, particularly in integrating optical signals with electronic circuits.
Innovation Solution
A photonic quasi-monolithic die architecture is introduced, comprising multiple IC dies with high-density interconnects, including a bridge die surrounded by dielectric material, a processor IC, a photonic IC, and a fiber connector, all connected with interconnects having pitches of less than 10 microns, enabling efficient electrical and optical coupling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional IC packaging is used, then manufacturing process is simple, but interconnect density is low and bandwidth is limited
Solution Approach 1:
The system is divided into multiple IC dies (processor die, memory die, photonic die) that are separately fabricated and then assembled together. Each die can be optimized for its specific function while the overall system achieves high interconnect density through the modular assembly structure with precise alignment features
Solution Approach 2:
The patent transitions from planar, two-dimensional interconnect architecture to three-dimensional stacked architecture with vertical interconnects through the substrate. This adds a vertical dimension to the interconnect density, enabling high-bandwidth communication between layers while maintaining compact footprint
2Adaptability or versatility
If fiber coupling is implemented for optical access, then optical communication capability is achieved, but manufacturing complexity and cost increase
Solution Approach 1:
The photonic die is merged with the electronic IC dies in a unified package structure, integrating optical and electronic functions. The fiber array is directly coupled to the photonic die surfaces, combining optical communication and electronic processing in a single integrated system rather than separate modules
Solution Approach 2:
The substrate serves as an intermediary platform that provides both mechanical support and electrical interconnection between the photonic die and electronic dies. It mediates between the optical and electronic domains, enabling simultaneous electrical and optical access without requiring separate coupling mechanisms
3Quantity of substance
If high-density interconnects with pitch less than 10 microns are used, then interconnect density and bandwidth are improved, but manufacturing precision requirements increase
Solution Approach 1:
Precise alignment features and positioning structures are pre-formed on each die and the substrate during fabrication. These preliminary precision features ensure that when the dies are assembled, the high-density interconnects automatically align correctly without requiring post-assembly adjustment, thereby achieving sub-10 micron pitch with controlled manufacturing precision
Data Source
AI summary
Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include an interconnect die in a first layer surrounded by a dielectric material; a processor integrated circuit (processor IC) and an integrated circuit (IC) in a second layer, the second layer on the first layer, wherein the interconnect die is electrically coupled to the processor IC and the IC by first interconnects having a pitch of less than 10 microns between adjacent first interconnects; a photonic integrated circuit (PIC) and a substrate in a third layer, the third layer on the second layer, wherein the PIC has an active surface, and wherein the active surface of the PIC is coupled to the IC by second interconnects having a pitch of less than 10 microns between adjacent second interconnects; and a fiber connector optically coupled to the active surface of the PIC.