3D Photonic IC Package Layout for Optical Stacking and Heat Dissipation

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Solution Overview

Problem

Current three-dimensional heterogeneous integration solutions for photonic integrated circuits (PICs) face scalability limitations due to thermal and mechanical constraints, as well as limited bandwidth and power delivery issues, restricting the number of ICs that can be stacked and the width of silicon inclusions.

Innovation Solution

The implementation of a microelectronic assembly with two light source layers and an optical interconnect layer sandwiched between them, allowing for both vertical and horizontal optical communications, along with a channel for enhanced heat dissipation and pillars for mechanical support and power delivery, which enables more efficient thermo-mechanical capabilities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If three-dimensional heterogeneous integration solutions are implemented to increase functional density, then the number of ICs that can be stacked increases, but thermal and mechanical constraints limit further scalability

Engineering Contradiction:
Improvenumber of ICs stackedVSAvoidthermal constraints
Core Design Contradiction:
Quantity of substanceVSTemperature

Solution Approach 1:

The patent transitions from traditional two-dimensional planar integration to three-dimensional vertical stacking, enabling multiple ICs to be stacked vertically. This dimensional change increases functional density and the number of ICs that can be integrated in a given footprint, while the interposer provides thermal management pathways to address thermal constraints in the vertical dimension.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent introduces an interposer as an intermediary layer between stacked ICs. This interposer serves multiple functions: providing mechanical support for vertical stacking, enabling thermal dissipation pathways, and facilitating electrical interconnections. The interposer acts as a mediator that resolves the conflict between increasing stack height and managing thermal/mechanical constraints.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Power

If more ICs are stacked vertically to increase bandwidth, then optical communication capability improves, but power delivery issues arise

Engineering Contradiction:
ImprovebandwidthVSAvoidpower delivery
Core Design Contradiction:
PowerVSUse of energy by moving object

Solution Approach 1:

The patent replaces traditional electrical interconnects with optical interconnects for data transmission between stacked ICs. This substitution enables high-bandwidth communication while reducing power consumption and avoiding power delivery issues associated with long electrical traces through multiple IC layers. Optical signals can carry more data with lower energy loss.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Power

If the width of silicon inclusions is increased to improve optical communication, then bandwidth increases, but mechanical constraints are exceeded

Engineering Contradiction:
ImprovebandwidthVSAvoidmechanical constraints
Core Design Contradiction:
PowerVSStrength

Solution Approach 1:

The patent moves optical interconnects from the planar dimension into the vertical dimension through the interposer. This allows optical pathways to extend vertically between IC layers without requiring excessive horizontal width of silicon inclusions. The vertical dimension provides additional space for optical waveguides and light sources, enabling high bandwidth while maintaining mechanical integrity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the scalability of PIC packages by allowing for more microelectronic units in a stack while overcoming thermal and mechanical limitations, enabling both vertical and horizontal optical interconnects without the bandwidth and power delivery constraints of existing solutions.

Implementation Method 1

a first layer including a first array of micro-LEDs; a second layer including a second array of micro-LEDs

Methodology Applied
Scientific EffectLight emission: Light Emitting Diode

Implementation Method 2

a channel for enhanced heat dissipation

Methodology Applied
Scientific EffectHeat dissipation: Conduction (thermal)

Data Source

PatentUS20240355980A1Photonic integrated circuit packages with scalable heterogeneous integration
Publication Date: 2024.10.24 INTEL CORP
  • US20240355980A1 patent drawing
  • US20240355980A1 patent drawing
  • US20240355980A1 patent drawing

AI summary

An IC package may include a stack of microelectronic units capable of horizontal and vertical optical communications. A microelectronic unit includes one or more power delivery pillars, two light source layers, an optical interconnect layer between the light source layers, and one or more IC devices arranged on the optical interconnect layer. A light source layer includes micro-LEDs that emit light used for generating optical signals. The optical interconnect layer includes one or more optical interconnects that enable horizontal optical communication, e.g., transmission of optical signals between the IC devices. A light source layer in the microelectronic unit can facilitate optical communications with another microelectronic unit that is below or above the microelectronic unit. A channel may exist above or below the light source layer to promote dissipation of heat generated by the IC devices. Light from the light source layer may pass through the channel for vertical optical communication.