Photonic IC Packaging With Vertical Optical Access and Dense Interconnects

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Solution Overview

Problem

Packaging photonic integrated circuits (PICs) poses challenges due to the need for parallel tight-pitch interconnects for high-density electrical communication and optical access, with existing architectures consuming substantial PIC area for fiber coupling and limiting electrical interconnect density.

Innovation Solution

A photonic packaging architecture that includes a package substrate, insulating material, PIC with an active side, and optical lens coupled laterally, allowing for electrical and optical coupling while minimizing PIC exposure, using high-density interconnects and optical elements like waveguides and lenses to facilitate efficient signal transfer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If fiber coupling structures are added to PIC for optical access, then optical communication capability is improved, but PIC area is substantially consumed

Engineering Contradiction:
Improveoptical communication capabilityVSAvoidPIC area
Core Design Contradiction:
Adaptability or versatilityVSArea of moving object

Solution Approach 1:

The patent transitions from planar fiber coupling to three-dimensional optical access by positioning the optical component vertically above the PIC. This vertical dimension allows optical coupling without consuming lateral PIC area, resolving the contradiction between optical capability and area usage.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The optical component is nested vertically above the PIC structure, with the optical lens positioned over the waveguide output. This nested arrangement integrates optical functionality within the existing PIC footprint, avoiding additional area consumption while maintaining optical communication capability.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Productivity

If parallel tight-pitch interconnects are implemented for high-density electrical communication, then electrical communication density is improved, but manufacturing complexity increases

Engineering Contradiction:
Improveelectrical communication densityVSAvoidmanufacturing complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The electrical interconnect structure is segmented into multiple layers with through-silicon vias (TSVs) providing vertical connections. This segmentation allows tight-pitch interconnects to be manufactured using standard semiconductor fabrication processes, reducing overall manufacturing complexity while achieving high electrical density.

Inventive Principle:
Principle #1Segmentation

3Adaptability or versatility

If PIC is exposed for fiber coupling, then optical access is enabled, but device footprint increases

Engineering Contradiction:
Improveoptical accessVSAvoiddevice footprint
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent enables optical access by extending the waveguide vertically and positioning the optical lens in the z-dimension above the PIC. This eliminates the need for lateral PIC exposure, maintaining a compact device footprint while providing full optical access capability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables smaller footprint, higher density, and reduced manufacturing costs by optimizing electrical and optical connectivity within the PIC, supporting efficient signal exchange and reduced power consumption.

Implementation Method 1

an optical lens coupled laterally to the PIC on the lateral side

Methodology Applied
Scientific EffectOptical focusing: Lens

Implementation Method 2

the PIC is embedded in an insulating material

Methodology Applied
Scientific EffectElectrical insulation: Dielectric

Data Source

PatentUS20260099015A1Photonic integrated circuit packaging architectures
Publication Date: 2026.04.09 INTEL CORP
  • US20260099015A1 patent drawing
  • US20260099015A1 patent drawing
  • US20260099015A1 patent drawing

AI summary

Microelectronic assemblies including photonic integrated circuits (PICs), related devices and methods, are disclosed herein. For example, in some embodiments, a photonic assembly may include a PIC in a first layer including an insulating material, wherein the PIC has an active side and an opposing backside, and wherein the PIC is embedded in the insulating material with the active side facing up; an optical component optically coupled to the active surface of the PIC and extending at least partially through the first layer; and an integrated circuit (IC) in a second layer, wherein the second layer is on the first layer, wherein the second layer includes the insulating material, wherein the IC is embedded in the insulating material in the second layer, and wherein the IC is electrically coupled to the active side of the PIC.