Programmable Photonic Interposer Tiles for Low-Power Chip Links
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Solution Overview
Problem
Modern computing systems face scalability limitations due to power consumption, thermal issues, and bandwidth constraints, particularly in inter-chip and intra-chip communication, with existing electrical connections being power-hungry and bandwidth-limited.
Innovation Solution
The implementation of photonic interposers with programmable photonic tiles and optical connections that enable low-power, high-bandwidth communication between chips, allowing for flexible network topologies and efficient integration of heterogeneous technologies on a single wafer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If electrical connections are used for inter-chip and intra-chip communication, then data transmission is achieved, but power consumption increases and bandwidth is limited
Solution Approach 1:
The patent replaces electrical connection systems with photonic communication systems. Specifically, it substitutes electrical signals transmitted through metal traces with optical signals transmitted through waveguides and optical fibers, fundamentally changing the transmission medium from electrical to optical domain to achieve lower power consumption and higher bandwidth
Solution Approach 2:
The patent changes the fundamental parameter of signal transmission from electrical to optical. By using light instead of electricity for data transmission, the system achieves dramatically improved power efficiency and bandwidth capacity, as optical signals can carry more information with less energy loss
2Reliability
If electrical connections are used for inter-chip communication, then communication is established, but thermal issues and scalability limitations occur
Solution Approach 1:
The patent substitutes electrical inter-chip communication with photonic communication. By replacing electrical signals with optical signals, the system eliminates the resistive heating problems inherent in electrical connections, thereby resolving thermal constraints while improving communication reliability and scalability
3Ease of manufacture
If fixed network topologies are used, then manufacturing is simplified, but adaptability and flexibility are reduced
Solution Approach 1:
The patent introduces dynamic reconfigurability to the photonic interconnect system. The optical switching fabric allows network topologies to be dynamically changed based on communication needs, enabling the system to adapt between different connectivity patterns (e.g., mesh, torus, fat-tree) without physical reconfiguration, thus achieving both manufacturing simplicity and operational flexibility
Solution Approach 2:
The patent creates a universal photonic interconnect platform that can support multiple network topologies and communication patterns through a single reconfigurable optical switching fabric. This multi-functional design allows the same hardware infrastructure to serve different computational workloads and architectural requirements
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The photonic interposers provide high-bandwidth, low-latency communication, address thermal constraints, and enable scalable computing architectures by leveraging photonic links, reducing manufacturing costs and improving coherence management across memory chips.
Implementation Method 1
each programmable interconnection comprises a waveguide crossing and an active coupler
Implementation Method 2
the first waveguide is evanescently coupled with the second waveguide and the second waveguide is evanescently coupled with the third waveguide
Implementation Method 3
The transceiver comprises a plurality of modulators, coupled to a first bus waveguide of the first set of bus waveguides, tuned at different wavelengths relative to one another; and a plurality of drop filters, coupled to a second bus waveguide of the first set of bus waveguides, tuned at different wavelengths relative to one another
Implementation Method 4
tuned at different wavelengths relative to one another
Implementation Method 5
each of the plurality of photonics tiles further comprises an interferometer having an input and first and second outputs, and a resonant filter
Implementation Method 6
an optical distribution network comprising a first set of bus waveguides optically coupled to the transceiver, a second set of bus waveguides
Data Source
AI summary
Photonic interposers that enable low-power, high-bandwidth inter-chip (e.g., board-level and/or rack-level) as well as intra-chip communication are described. Described herein are techniques, architectures and processes that improve upon the performance of conventional computers. Some embodiments provide photonic interposers that use photonic tiles, where each tile includes programmable photonic circuits that can be programmed based on the needs of a particular computer architecture. Some tiles are instantiations of a common template tile that are stitched together in a 1D or a 2D arrangement. Some embodiments described herein provide a programmable physical network designed to connect pairs of tiles together with photonic links.