Photonic Interposer for Chiplet Communication Beyond Die Edges

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Solution Overview

Problem

Existing chiplet communication technologies suffer from bandwidth limitations due to the 'beachfront' constraint, where data transfer is restricted to the edges of dies, leading to increased latency, power consumption, and reduced manufacturing yields in large silicon dies, and existing optical solutions do not address these issues.

Innovation Solution

Implementing a photonic interposer with an optical network and controllable optical switches that enable direct optical communication between chiplets, allowing ports to be positioned anywhere within the die, eliminating the need for edge-based data transfer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If electrical communication using metal traces is used to connect memories and processors, then the system can achieve reliable data transfer, but the bandwidth is limited and latency increases due to the beachfront constraint that restricts data transfer to edges of dies

Engineering Contradiction:
Improvedata transfer reliabilityVSAvoidbandwidth density
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent replaces the electrical communication system (metal traces) with an optical communication system (waveguides). This substitution enables direct optical communication between chiplets through the photonic interposer, eliminating the beachfront constraint that limits electrical connections to edge-based transfers. The optical waveguides can extend throughout the substrate, allowing ports to be positioned anywhere within the die area, thereby significantly increasing bandwidth density while maintaining reliable data transfer.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Adaptability or versatility

If large silicon dies are used to increase processing capacity, then more functionality can be integrated, but manufacturing yields decrease and defect rates increase

Engineering Contradiction:
Improveprocessing capacityVSAvoidmanufacturing yield
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent divides the large silicon die into multiple smaller chiplets that can be manufactured separately with high yields. These chiplets are then interconnected using the photonic interposer with optical waveguides, which provide the necessary bandwidth and connectivity. This segmentation approach allows the system to achieve the processing capacity of a large die while maintaining the manufacturing advantages of smaller, more yield-friendly individual chiplets.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The photonic interposer acts as an intermediary between multiple chiplets, providing optical communication pathways that enable high-bandwidth interconnection. This intermediary substrate with integrated waveguides allows chiplets to be connected in a modular fashion, achieving the functionality of a large integrated die while allowing each chiplet to be manufactured separately at optimal sizes for high yield.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If edge-based data transfer is used due to beachfront constraint, then electrical connections can be simplified, but latency increases and power consumption increases

Engineering Contradiction:
Improveconnection simplicityVSAvoiddata transfer latency
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The patent transitions from two-dimensional edge-based connections to three-dimensional volumetric optical pathways through the photonic interposer. The waveguides can extend vertically and horizontally through the substrate, allowing direct optical paths between any pair of ports on different chiplets. This dimensional expansion eliminates the need for data to travel to edges and back, significantly reducing latency while the optical nature of the connections maintains relatively simple interconnection architecture.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

4Productivity

If more ports are positioned at edges to increase bandwidth, then data transfer capacity improves, but the beachfront constraint limits the available area for other functions

Engineering Contradiction:
Improvedata transfer capacityVSAvoidavailable die area
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

The patent utilizes the third dimension (vertical depth of the photonic interposer) to route optical waveguides between chiplets. This allows ports to be positioned anywhere on the chiplet surfaces without requiring edge proximity, as the waveguides can provide direct optical paths through the volumetric interposer structure. Consequently, high bandwidth can be achieved with ports positioned in areas that do not compete with other functional elements on the chiplet surfaces.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly increases bandwidth density and reduces latency and power consumption by enabling direct optical communication across any points within the die, overcoming the limitations of conventional electrical and optical chiplet connections.

Implementation Method 1

a photonic interposer having an optical network comprising a plurality of waveguides

Methodology Applied
Scientific EffectWaveguide: Waveguide (optics)

Implementation Method 2

a plurality of controllable optical switches

Methodology Applied
Scientific EffectOptical switching:

Data Source

PatentUS12379548B2Chiplet communication using an optical communication substrate
Publication Date: 2025.08.05 LIGHTMATTER INC
  • US12379548B2 patent drawing
  • US12379548B2 patent drawing
  • US12379548B2 patent drawing

AI summary

Described herein are a computing systems comprising a photonic interposer having an optical network comprising a plurality of waveguides and a plurality of controllable optical switches; an electronic die having a surface bonded to the photonic interposer, an inner interface comprising a first plurality of ports electrically coupling the electronic die to the photonic interposer through the surface; and an outer interface comprising a second plurality of ports electrically coupling the electronic die to the photonic interposer through the surface, wherein the outer interface at least partially encloses the inner interface.