Photonic Integrated Circuit Fabrication via Layer Bonding
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The complex and costly fabrication processes for photonic integrated circuits (PICs) with multiple components result in lower yields and compromised performance due to the need for unique processing steps and materials that must work for all devices, leading to increased expenses and inefficiencies.
Innovation Solution
The method involves growing photonic device layers from different optimized materials, cutting them into pieces, and bonding them to a shared wafer, allowing for simultaneous shared processing operations to form multiple devices in parallel, thereby simplifying and cost-effectively fabricating PICs while improving performance and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If unique processing steps are used for each photonic device to optimize performance, then device performance is improved, but fabrication complexity and cost increase
Solution Approach 1:
The fabrication process is segmented into device-specific steps and shared steps. Each photonic device undergoes unique processing steps tailored to its specific material and performance requirements, followed by shared processing steps that can be applied to multiple devices simultaneously. This segmentation allows optimization of individual device performance while reducing overall fabrication complexity through shared operations.
Solution Approach 2:
Device-specific processing steps are performed in advance before shared processing steps. Each photonic device is prepared with its optimized materials and structures first, then all devices are subjected to common fabrication steps together. This preliminary action ensures that each device maintains its performance optimization while benefiting from the efficiency of shared processing.
2Adaptability or versatility
If many unique processing steps are executed for each photonic device, then device functionality is achieved, but manufacturing yield decreases
Solution Approach 1:
Multiple photonic devices are combined on a single semiconductor wafer, allowing them to undergo shared processing steps simultaneously. This merging approach maintains the functional diversity of individual devices while significantly improving manufacturing yield by reducing the cumulative effect of yield loss across multiple separate fabrication processes.
3Ease of manufacture
If a single material and process are chosen to work for all photonic devices, then fabrication simplicity is improved, but device performance is compromised
Solution Approach 1:
Different regions of the semiconductor wafer are assigned different materials and processing parameters optimized for specific photonic device types. Each device location on the wafer has locally optimized quality characteristics, allowing maximum performance for each device type while still enabling shared fabrication infrastructure and processes across the entire wafer.
4Reliability
If photonic devices are fabricated separately to optimize each device, then device performance is maximized, but manufacturing cost and time increase
Solution Approach 1:
Multiple photonic devices are fabricated simultaneously on a single semiconductor wafer through shared processing steps, significantly reducing total manufacturing time compared to separate fabrication of each device. Device-specific steps are performed beforehand, then all devices proceed through common processing operations in parallel, maintaining performance optimization while accelerating production.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces manufacturing costs and time, increases yield, and enhances the reliability of PICs by enabling parallel processing of diverse components on a shared wafer, avoiding the need for re-growth and local epi optimization, and allowing for optimized material usage.
Implementation Method 1
A method for forming a plurality of photonic heterogeneous devices is disclosed. A plurality of non-silicon semiconductor device component layers are formed from a plurality of epitaxially grown wafers
Data Source
Figure 1A~1B
Figure 2
Figure 3A
AI summary
Embodiments of the invention describe photonic integrated circuits (PICs) formed using simultaneous fabrication operations performed on photonic device layers. Each device of a PIC may be made from different optimized materials by growing the materials separately, cutting pieces of the different materials and bonding these pieces to a shared wafer. Embodiments of the invention bond photonic device layers so that shared (i.e., common) processing operations may be utilized to make more than one device simultaneously. Embodiments of the invention allow for simpler, more cost effective fabrication of PICs and improve photonic device performance and reliability.